qemu/target
Philippe Mathieu-Daudé 36b39a69b2 target/mips: Fix MSA MSUBV.B opcode
The result of the 'Vector Multiply and Subtract' opcode is
incorrect with Byte vectors. Probably due to a copy/paste error,
commit 5f148a0232 mistakenly used the $wt (target register)
instead  of $wd (destination register) as first operand. Fix that.

Cc: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com>
Fixes: 5f148a0232 ("target/mips: msa: Split helpers for MSUBV.<B|H|W|D>")
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20211028210843.2120802-3-f4bug@amsat.org>
2021-11-02 14:32:32 +01:00
..
alpha target/alpha: Drop checks for singlestep_enabled 2021-10-15 16:39:14 -07:00
arm target/arm: Drop checks for singlestep_enabled 2021-10-15 16:39:14 -07:00
avr target/avr: Drop checks for singlestep_enabled 2021-10-15 16:39:14 -07:00
cris target/cris: Drop checks for singlestep_enabled 2021-10-15 16:39:14 -07:00
hexagon Hexagon (target/hexagon) put writes to USR into temp until commit 2021-10-28 22:22:49 -05:00
hppa target/hppa: Drop checks for singlestep_enabled 2021-10-15 16:39:14 -07:00
i386 target/i386: Remove core-capability in Snowridge CPU model 2021-10-29 15:02:30 -04:00
m68k target/m68k: Drop checks for singlestep_enabled 2021-10-15 16:39:14 -07:00
microblaze target/microblaze: Drop checks for singlestep_enabled 2021-10-15 16:39:14 -07:00
mips target/mips: Fix MSA MSUBV.B opcode 2021-11-02 14:32:32 +01:00
nios2 disas/nios2: Simplify endianess conversion 2021-10-22 18:07:30 +02:00
openrisc target/openrisc: Drop checks for singlestep_enabled 2021-10-15 16:39:14 -07:00
ppc host-utils: add 128-bit quotient support to divu128/divs128 2021-10-27 17:10:00 -07:00
riscv target/riscv: change the api for RVF/RVD fmin/fmax 2021-10-29 16:56:12 +10:00
rx target/rx: Drop checks for singlestep_enabled 2021-10-15 16:39:14 -07:00
s390x target/s390x: Drop check for singlestep_enabled 2021-10-15 16:39:14 -07:00
sh4 target/sh4: Drop check for singlestep_enabled 2021-10-15 16:39:14 -07:00
sparc target/sparc: Use cpu_*_mmu instead of helper_*_mmu 2021-10-13 08:45:13 -07:00
tricore target/tricore: Drop check for singlestep_enabled 2021-10-15 16:39:14 -07:00
xtensa target/xtensa: Drop check for singlestep_enabled 2021-10-15 16:39:15 -07:00
Kconfig meson: Introduce target-specific Kconfig 2021-07-09 18:21:34 +02:00
meson.build Drop the deprecated unicore32 target 2021-05-12 18:20:52 +02:00