qemu/target
Alistair Francis 7ec5d3030b target/riscv: Remove atomic accesses to MIP CSR
Instead of relying on atomics to access the MIP register let's update
our helper function to instead just lock the IO mutex thread before
writing. This follows the same concept as used in PPC for handling
interrupts

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Palmer Dabbelt <palmer@dabbelt.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com>
2019-11-14 09:53:28 -08:00
..
alpha target/alpha: fetch code with translator_ld 2019-10-28 15:12:38 +00:00
arm target/arm: Allow reading flags from FPSCR for M-profile 2019-11-01 20:41:00 +00:00
cris cputlb: ensure _cmmu helper functions follow the naming standard 2019-10-28 15:12:38 +00:00
hppa target/hppa: fetch code with translator_ld 2019-10-28 15:12:38 +00:00
i386 target/i386: fetch code with translator_ld 2019-10-28 15:12:38 +00:00
lm32 Monitor patches for 2019-08-21 2019-08-22 10:31:21 +01:00
m68k target/m68k: fetch code with translator_ld 2019-10-28 15:12:38 +00:00
microblaze target/microblaze: Plug temp leak around eval_cond_jmp() 2019-11-12 16:35:26 +01:00
mips target/mips: Refactor handling of vector compare 'less than' (signed) instructions 2019-10-25 18:37:01 +02:00
moxie hw/core: Move cpu.c, cpu.h from qom/ to hw/core/ 2019-08-21 13:24:01 +02:00
nios2 Monitor patches for 2019-08-21 2019-08-22 10:31:21 +01:00
openrisc target/openrisc: fetch code with translator_ld 2019-10-28 15:12:38 +00:00
ppc target/ppc: fetch code with translator_ld 2019-10-28 15:12:38 +00:00
riscv target/riscv: Remove atomic accesses to MIP CSR 2019-11-14 09:53:28 -08:00
s390x s390x/kvm: Set default cpu model for all machine classes 2019-10-21 18:03:08 +02:00
sh4 target/sh4: fetch code with translator_ld 2019-10-28 15:12:38 +00:00
sparc target/sparc: Define an enumeration for accessing env->regwptr 2019-11-06 13:35:25 +01:00
tilegx tcg: TCGMemOp is now accelerator independent MemOp 2019-09-03 08:30:38 -07:00
tricore tcg: TCGMemOp is now accelerator independent MemOp 2019-09-03 08:30:38 -07:00
unicore32 Monitor patches for 2019-08-21 2019-08-22 10:31:21 +01:00
xtensa target/xtensa: fetch code with translator_ld 2019-10-28 15:12:38 +00:00