qemu/include/hw/intc
Jiaxun Yang 49eba52a52 hw/intc/loongson_ipi: Provide per core MMIO address spaces
The real IPI hardware have dedicated MMIO registers mapped into
memory address space for every core. This is not used by LoongArch
guest software but it is essential for CPU without IOCSR such as
Loongson-3A1000.

Implement it with existing infrastructure.

Acked-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Message-ID: <20240605-loongson3-ipi-v3-2-ddd2c0e03fa3@flygoat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-06-19 12:42:03 +02:00
..
allwinner-a10-pic.h
arm_gic_common.h
arm_gic.h
arm_gicv3_common.h
arm_gicv3_its_common.h
arm_gicv3.h
armv7m_nvic.h
aspeed_intc.h aspeed/intc: Add AST2700 support 2024-06-16 21:08:54 +02:00
aspeed_vic.h
bcm2835_ic.h
bcm2836_control.h
exynos4210_combiner.h
exynos4210_gic.h
goldfish_pic.h
grlib_irqmp.h
heathrow_pic.h
i8259.h
imx_avic.h
imx_gpcv2.h
intc.h hw/intc: Avoid using Monitor in INTERRUPT_STATS_PROVIDER::print_info() 2024-06-19 12:40:49 +02:00
ioapic.h
kvm_irqcount.h
loongarch_extioi.h
loongarch_pch_msi.h
loongarch_pch_pic.h
loongson_ipi.h hw/intc/loongson_ipi: Provide per core MMIO address spaces 2024-06-19 12:42:03 +02:00
loongson_liointc.h
m68k_irqc.h
mips_gic.h
ppc-uic.h
realview_gic.h
riscv_aclint.h
riscv_aplic.h
riscv_imsic.h
rx_icu.h
sifive_plic.h
xlnx-pmu-iomod-intc.h
xlnx-zynqmp-ipi.h