Will Newton 34f7b0a276 target-arm: Add AArch32 SIMD VRINTA, VRINTN, VRINTP, VRINTM, VRINTZ ... Add support for the AArch32 Advanced SIMD VRINTA, VRINTN, VRINTP VRINTM and VRINTZ instructions. Signed-off-by: Will Newton <will.newton@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>		2014-01-31 14:47:35 +00:00
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arm-semi.c
cpu64.c	target-arm: Switch ARMCPUInfo arrays to use terminator entries	2014-01-14 10:09:04 +10:00
cpu-qom.h
cpu.c	ARM: Convert MIDR to a property	2014-01-31 14:47:32 +00:00
cpu.h	target-arm: Move arm_rmode_to_sf to a shared location.	2014-01-31 14:47:33 +00:00
crypto_helper.c
gdbstub64.c
gdbstub.c
helper-a64.c	target-arm: A64: Add SIMD TBL/TBLX	2014-01-31 14:47:31 +00:00
helper-a64.h	target-arm: A64: Add SIMD TBL/TBLX	2014-01-31 14:47:31 +00:00
helper.c	target-arm: Add set_neon_rmode helper	2014-01-31 14:47:35 +00:00
helper.h	target-arm: Add set_neon_rmode helper	2014-01-31 14:47:35 +00:00
iwmmxt_helper.c
kvm32.c
kvm64.c
kvm_arm.h
kvm-consts.h	target-arm: Update generic cpreg code for AArch64	2014-01-04 22:15:44 +00:00
kvm-stub.c
kvm.c
machine.c	target-arm: Widen exclusive-access support struct fields to 64 bits	2014-01-08 19:07:20 +00:00
Makefile.objs
neon_helper.c	target-arm: Use VFP_BINOP macro for min, max, minnum, maxnum	2014-01-08 19:07:21 +00:00
op_addsub.h
op_helper.c
translate-a64.c	target-arm: Move arm_rmode_to_sf to a shared location.	2014-01-31 14:47:33 +00:00
translate.c	target-arm: Add AArch32 SIMD VRINTA, VRINTN, VRINTP, VRINTM, VRINTZ	2014-01-31 14:47:35 +00:00
translate.h	target-arm: Remove ARMCPU/CPUARMState from cpregs APIs used by decoder	2014-01-07 19:17:58 +00:00