qemu/tests/tcg/mips
Petar Jovanovic 34f5606ee1 target-mips: Fix incorrect code and test for INSV
Content of register rs should be shifted for pos before applying a mask.
This change contains both fix for the instruction and to the existing test.

Signed-off-by: Petar Jovanovic <petarj@mips.com>
Reviewed-by: Eric Johnson <ericj@mips.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-12-06 08:10:50 +01:00
..
mips32-dsp target-mips: Fix incorrect code and test for INSV 2012-12-06 08:10:50 +01:00
mips32-dspr2
mips64-dsp
mips64-dspr2