qemu/target at 34602f9904aaea163e63a157a568ccc70d38397c - qemu

History

Peter Maydell 8e6bc6cdc8 Prepare MacOS ROM support:

- add RTR instruction
   - fix unaligned access requirement
   - fix ATC bit (68040 MMU)
 -----BEGIN PGP SIGNATURE-----
 
 iQJGBAABCAAwFiEEzS913cjjpNwuT1Fz8ww4vT8vvjwFAmBKlyMSHGxhdXJlbnRA
 dml2aWVyLmV1AAoJEPMMOL0/L748RNYP/A/5lAz3t91tx65RX12pYCMNzyhtfL+q
 UZeLx2YFJpruKEpcjS3a7/gUP/KoTf24CQOsAE6ETIsSshxBBeM+BF5/TaBlSv5G
 tc68GNNp7fSqPakqUG1WOsMeFjkl+2x52vWGRIef4b/fEHrjuOwPoN7SxTqcBCAa
 f9/A+9E0mTKbuZmKi+cYwk9LM2IadQndvV/M4UVBn6arWSQhkpuXg5t6IGxfAWQG
 C9PAuCWJy/MeCua7gkqWOlB3oBNBI3aVY1JZjvjTh2bUqXuZ2gnpkXpROrmJ5d44
 LFn1zWRuhL9Lpu/Cf6i5a2gnDrc3AE7s4cfOII1VpmVoc8QEfUcPC2IGA2OCG6x/
 MLNr5pRbHn/2pEWt9qsjePBq21AciODGSsz2DQb8hGlDVlFW1b2cD0W5wubxAX9D
 YfRDMTq5CeTCELnuBfd2Wd/Isg+ucmRH9wo0TQ4gxiRw7r1iZbPa/OUcbVeJmFCo
 u4YSHLjzEWHdMsKdAXdc75eSyaHn0DcdCaCWoGCa5CUMIUeqBsO09EeaTBSPMmk4
 azD658vpSiscRaYntXDsFPnKxYYfgFm9JiX0t5TBAeIX7WvXTNY3sws64FBsucEL
 pdM+3w+slwRWT2033Rekt4TZHYzCJYLTs4uCyGtXZVL373whedvS8H29iGXsfSQ0
 pM2r7u/BF7kc
 =Xrpn
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/vivier/tags/m68k-for-6.0-pull-request' into staging

Prepare MacOS ROM support:
  - add RTR instruction
  - fix unaligned access requirement
  - fix ATC bit (68040 MMU)

# gpg: Signature made Thu 11 Mar 2021 22:18:11 GMT
# gpg:                using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C
# gpg:                issuer "laurent@vivier.eu"
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full]
# gpg:                 aka "Laurent Vivier <laurent@vivier.eu>" [full]
# gpg:                 aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full]
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F  5173 F30C 38BD 3F2F BE3C

* remotes/vivier/tags/m68k-for-6.0-pull-request:
  target/m68k: add M68K_FEATURE_UNALIGNED_DATA feature
  target/m68k: reformat m68k_features enum
  target/m68k: don't set SSW ATC bit for physical bus errors
  target/m68k: implement rtr instruction

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

2021-03-12 18:56:56 +00:00

alpha

cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass

2021-02-05 10:24:15 -10:00

arm

Pull request

2021-03-11 18:55:27 +00:00

avr

target/avr/cpu: Use device_class_set_parent_realize()

2021-02-20 12:36:19 +01:00

cris

target/cris: Plug leakage of TCG temporaries