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Havard Skinnemoen 2ddae9cc04 hw/arm/npcm7xx: add board setup stub for CPU and UART clocks 
When booting directly into a kernel, bypassing the boot loader, the CPU and
UART clocks are not set up correctly. This makes the system appear very
slow, and causes the initrd boot test to fail when optimization is off.

The UART clock must run at 24 MHz. The default 25 MHz reference clock
cannot achieve this, so switch to PLL2/2 @ 480 MHz, which works
perfectly with the default /20 divider.

The CPU clock should run at 800 MHz, so switch it to PLL1/2. PLL1 runs
at 800 MHz by default, so we need to double the feedback divider as well
to make it run at 1600 MHz (so PLL1/2 runs at 800 MHz).

We don't bother checking for PLL lock because we know our emulated PLLs
lock instantly.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Havard Skinnemoen <hskinnemoen@google.com>
Message-id: 20200911052101.2602693-13-hskinnemoen@google.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-09-14 14:24:59 +01:00
..
9pfs Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
acpi trivial patches pull request 20200911 2020-09-12 14:23:15 +01:00
adc meson: convert hw/adc 2020-08-21 06:30:32 -04:00
alpha Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
arm hw/arm/npcm7xx: add board setup stub for CPU and UART clocks 2020-09-14 14:24:59 +01:00
audio Use OBJECT_DECLARE_TYPE where possible 2020-09-09 09:27:11 -04:00
avr Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
block QOM boilerplate cleanup 2020-09-11 19:26:51 +01:00
char This PR includes multiple fixes and features for RISC-V: 2020-09-13 20:29:35 +01:00
core Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
cpu Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
cris meson: convert hw/arch* 2020-08-21 06:30:33 -04:00
display QOM boilerplate cleanup 2020-09-11 19:26:51 +01:00
dma This PR includes multiple fixes and features for RISC-V: 2020-09-13 20:29:35 +01:00
gpio This PR includes multiple fixes and features for RISC-V: 2020-09-13 20:29:35 +01:00
hppa Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
hyperv trivial patches pull request 20200911 2020-09-12 14:23:15 +01:00
i2c Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
i386 Various misc and testing fixes: 2020-09-12 22:54:32 +01:00
ide ahci: Rename ICH_AHCI to ICH9_AHCI 2020-09-09 13:20:22 -04:00
input Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
intc This PR includes multiple fixes and features for RISC-V: 2020-09-13 20:29:35 +01:00
ipack Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
ipmi Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
isa trivial patches pull request 20200911 2020-09-12 14:23:15 +01:00
lm32 hw/sd/milkymist: Do not create SD card within the SD host controller 2020-08-21 16:22:43 +02:00
m68k esp: Rename ESP_STATE to ESP 2020-09-09 13:20:22 -04:00
mem hw/mem: Stubbed out NPCM7xx Memory Controller model 2020-09-14 14:24:59 +01:00
microblaze Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
mips trivial patches pull request 20200911 2020-09-12 14:23:15 +01:00
misc hw/misc: Add NPCM7xx Clock Controller device model 2020-09-14 14:24:58 +01:00
moxie meson: convert hw/arch* 2020-08-21 06:30:33 -04:00
net This PR includes multiple fixes and features for RISC-V: 2020-09-13 20:29:35 +01:00
nios2 meson: convert hw/arch* 2020-08-21 06:30:33 -04:00
nubus meson: convert hw/nubus 2020-08-21 06:30:25 -04:00
nvram hw/nvram: NPCM7xx OTP device model 2020-09-14 14:24:59 +01:00
openrisc meson: convert hw/arch* 2020-08-21 06:30:33 -04:00
pci meson: convert hw/pci 2020-08-21 06:30:28 -04:00
pci-bridge Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
pci-host sabre: Rename SABRE_DEVICE to SABRE 2020-09-09 13:20:22 -04:00
pcmcia pxa2xx: Move QOM macros to header 2020-08-27 14:04:55 -04:00
ppc QOM boilerplate cleanup 2020-09-11 19:26:51 +01:00
rdma Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
riscv hw/riscv: Sort the Kconfig options in alphabetical order 2020-09-09 15:54:19 -07:00
rtc QOM boilerplate cleanup 2020-09-11 19:26:51 +01:00
rx Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
s390x ap-device: Rename AP_DEVICE_TYPE to TYPE_AP_DEVICE 2020-09-09 13:20:22 -04:00
scsi esp: Rename ESP_STATE to ESP 2020-09-09 13:20:22 -04:00
sd This PR includes multiple fixes and features for RISC-V: 2020-09-13 20:29:35 +01:00
semihosting meson: convert hw/semihosting 2020-08-21 06:30:25 -04:00
sh4 Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
smbios hw/smbios: add options for type 4 max-speed and current-speed 2020-08-27 08:29:13 -04:00
sparc esp: Rename ESP_STATE to ESP 2020-09-09 13:20:22 -04:00
sparc64 sabre: Rename SABRE_DEVICE to SABRE 2020-09-09 13:20:22 -04:00
ssi hw/ssi: NPCM7xx Flash Interface Unit device model 2020-09-14 14:24:59 +01:00
timer hw/timer: Add NPCM7xx Timer device model 2020-09-14 14:24:58 +01:00
tpm QOM boilerplate cleanup 2020-09-11 19:26:51 +01:00
tricore meson: convert hw/arch* 2020-08-21 06:30:33 -04:00
unicore32 meson: convert hw/arch* 2020-08-21 06:30:33 -04:00
usb Various misc and testing fixes: 2020-09-12 22:54:32 +01:00
vfio QOM boilerplate cleanup 2020-09-11 19:26:51 +01:00
virtio QOM boilerplate cleanup 2020-09-11 19:26:51 +01:00
watchdog Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
xen Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
xenpv meson: convert hw/arch* 2020-08-21 06:30:33 -04:00
xtensa target/xtensa: implement NMI support 2020-08-21 12:48:14 -07:00
Kconfig hw/avr: Add limited support for some Arduino boards 2020-07-11 11:02:05 +02:00
meson.build meson: convert hw/arch* 2020-08-21 06:30:33 -04:00