Cédric Le Goater 6da4433fc5 aspeed/smc: add a 'sdram_base' property ...

The DRAM address of a DMA transaction depends on the DRAM base address
of the SoC. Inform the SMC controller model with this value.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20190618165311.27066-15-clg@kaod.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

2019-07-01 17:28:59 +01:00

..

aspeed_smc.h

aspeed/smc: add a 'sdram_base' property

2019-07-01 17:28:59 +01:00

imx_spi.h

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mss-spi.h

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pl022.h

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ssi.h

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stm32f2xx_spi.h

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xilinx_spips.h

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