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32a290b8c3
qemu/target/arm
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Peter Maydell 32a290b8c3 target/arm: Refactor M-profile VMSR/VMRS handling 
Currently M-profile borrows the A-profile code for VMSR and VMRS
(access to the FP system registers), because all it needs to support
is the FPSCR.  In v8.1M things become significantly more complicated
in two ways:

 * there are several new FP system registers; some have side effects
   on read, and one (FPCXT_NS) needs to avoid the usual
   vfp_access_check() and the "only if FPU implemented" check

 * all sysregs are now accessible both by VMRS/VMSR (which
   reads/writes a general purpose register) and also by VLDR/VSTR
   (which reads/writes them directly to memory)

Refactor the structure of how we handle VMSR/VMRS to cope with this:

 * keep the M-profile code entirely separate from the A-profile code

 * abstract out the "read or write the general purpose register" part
   of the code into a loadfn or storefn function pointer, so we can
   reuse it for VLDR/VSTR.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20201119215617.29887-8-peter.maydell@linaro.org
2020-12-10 11:44:55 +00:00
..
a32-uncond.decode arm tcg cpus: Fix Lesser GPL version number 2020-11-15 16:42:14 +01:00
a32.decode arm tcg cpus: Fix Lesser GPL version number 2020-11-15 16:42:14 +01:00
arch_dump.c target/arm: add spaces around operator 2020-11-10 11:03:47 +00:00
arm_ldst.h arm tcg cpus: Fix Lesser GPL version number 2020-11-15 16:42:14 +01:00
arm-powerctl.c arm/arm-powerctl: rebuild hflags after setting CP15 bits in arm_set_cpu_on() 2019-12-20 14:03:00 +00:00
arm-powerctl.h
arm-semi.c target/arm: Make SYS_HEAPINFO work with RAM that doesn't start at 0 2020-11-23 11:03:27 +00:00
cpu64.c target/arm: Make '-cpu max' have a 48-bit PA 2020-10-08 21:40:01 +01:00
cpu_tcg.c target/arm: Add ID register values for Cortex-M0 2020-10-01 15:31:00 +01:00
cpu-param.h target/arm: Don't use a TLB for ARMMMUIdx_Stage2 2020-05-04 10:32:46 +01:00
cpu-qom.h qom: Remove module_obj_name parameter from OBJECT_DECLARE* macros 2020-09-18 14:12:32 -04:00
cpu.c target/arm: Don't clobber ID_PFR1.Security on M-profile cores 2020-12-10 11:44:55 +00:00
cpu.h target/arm: Refactor M-profile VMSR/VMRS handling 2020-12-10 11:44:55 +00:00
crypto_helper.c arm tcg cpus: Fix Lesser GPL version number 2020-11-15 16:42:14 +01:00
debug_helper.c target/arm: Stop assuming DBGDIDR always exists 2020-02-21 16:07:01 +00:00
gdbstub64.c arm tcg cpus: Fix Lesser GPL version number 2020-11-15 16:42:14 +01:00
gdbstub.c arm tcg cpus: Fix Lesser GPL version number 2020-11-15 16:42:14 +01:00
helper-a64.c arm tcg cpus: Fix Lesser GPL version number 2020-11-15 16:42:14 +01:00
helper-a64.h arm tcg cpus: Fix Lesser GPL version number 2020-11-15 16:42:14 +01:00
helper-sve.h arm tcg cpus: Fix Lesser GPL version number 2020-11-15 16:42:14 +01:00
helper.c target/arm: Implement v8.1M PXN extension 2020-12-10 11:44:55 +00:00
helper.h target/arm: Fix neon VTBL/VTBX for len > 1 2020-11-10 11:03:48 +00:00
idau.h Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
internals.h target/arm: Ignore HCR_EL2.ATA when {E2H,TGE} != 11 2020-10-20 16:12:00 +01:00
iwmmxt_helper.c arm tcg cpus: Fix Lesser GPL version number 2020-11-15 16:42:14 +01:00
kvm64.c hw/arm/virt: Implement kvm-steal-time 2020-10-08 15:24:32 +01:00
kvm_arm.h hw/arm/virt: Implement kvm-steal-time 2020-10-08 15:24:32 +01:00
kvm-consts.h target/arm: Remove no-longer-reachable 32-bit KVM code 2020-09-14 14:23:19 +01:00
kvm-stub.c
kvm.c hw/arm/virt: Implement kvm-steal-time 2020-10-08 15:24:32 +01:00
m_helper.c target/arm: Get correct MMU index for other-security-state 2020-11-02 16:52:17 +00:00
m-nocp.decode target/arm: Implement VSCCLRM insn 2020-12-10 11:44:55 +00:00
machine.c target/arm: Add isar_feature_aa64_fp_simd, isar_feature_aa32_vfp 2020-02-28 16:14:57 +00:00
meson.build target/arm: Remove KVM support for 32-bit Arm hosts 2020-09-14 14:23:19 +01:00
monitor.c hw/arm/virt: Implement kvm-steal-time 2020-10-08 15:24:32 +01:00
mte_helper.c target/arm: Fix reported EL for mte_check_fail 2020-10-20 16:12:00 +01:00
neon_helper.c target/arm: Convert Neon VADD, VSUB, VABD 3-reg-same insns to decodetree 2020-05-14 15:03:09 +01:00
neon-dp.decode arm tcg cpus: Fix Lesser GPL version number 2020-11-15 16:42:14 +01:00
neon-ls.decode arm tcg cpus: Fix Lesser GPL version number 2020-11-15 16:42:14 +01:00
neon-shared.decode arm tcg cpus: Fix Lesser GPL version number 2020-11-15 16:42:14 +01:00
op_addsub.h
op_helper.c arm tcg cpus: Fix Lesser GPL version number 2020-11-15 16:42:14 +01:00
pauth_helper.c arm tcg cpus: Fix Lesser GPL version number 2020-11-15 16:42:14 +01:00
psci.c
sve_helper.c arm tcg cpus: Fix Lesser GPL version number 2020-11-15 16:42:14 +01:00
sve.decode arm tcg cpus: Fix Lesser GPL version number 2020-11-15 16:42:14 +01:00
t16.decode arm tcg cpus: Fix Lesser GPL version number 2020-11-15 16:42:14 +01:00
t32.decode target/arm: Implement CLRM instruction 2020-12-10 11:44:55 +00:00
tlb_helper.c target/arm: Cache the Tagged bit for a page in MemTxAttrs 2020-06-26 14:31:12 +01:00
trace-events
trace.h trace: switch position of headers to what Meson requires 2020-08-21 06:18:24 -04:00
translate-a64.c arm tcg cpus: Fix Lesser GPL version number 2020-11-15 16:42:14 +01:00
translate-a64.h arm tcg cpus: Fix Lesser GPL version number 2020-11-15 16:42:14 +01:00
translate-neon.c.inc arm tcg cpus: Fix Lesser GPL version number 2020-11-15 16:42:14 +01:00
translate-sve.c arm tcg cpus: Fix Lesser GPL version number 2020-11-15 16:42:14 +01:00
translate-vfp.c.inc target/arm: Refactor M-profile VMSR/VMRS handling 2020-12-10 11:44:55 +00:00
translate.c target/arm: Implement CLRM instruction 2020-12-10 11:44:55 +00:00
translate.h target/arm: Rearrange {sve,fp}_check_access assert 2020-08-28 10:02:47 +01:00
vec_helper.c arm tcg cpus: Fix Lesser GPL version number 2020-11-15 16:42:14 +01:00
vec_internal.h arm tcg cpus: Fix Lesser GPL version number 2020-11-15 16:42:14 +01:00
vfp_helper.c target/arm: Implement FPSCR.LTPSIZE for M-profile LOB extension 2020-10-20 16:12:01 +01:00
vfp-uncond.decode arm tcg cpus: Fix Lesser GPL version number 2020-11-15 16:42:14 +01:00
vfp.decode arm tcg cpus: Fix Lesser GPL version number 2020-11-15 16:42:14 +01:00