f6c01009b5
Section 10.3 of the Hexagon V73 Programmer's Reference Manual A duplex is encoded as a 32-bit instruction with bits [15:14] set to 00. The sub-instructions that comprise a duplex are encoded as 13-bit fields in the duplex. Create a decoder for each subinstruction class (a, l1, l2, s1, s2). Extend gen_trans_funcs.py to handle all instructions rather than filter by instruction class. There is a g_assert_not_reached() in decode_insns() in decode.c to verify we never try to use the old decoder on 16-bit instructions. Signed-off-by: Taylor Simpson <ltaylorsimpson@gmail.com> Reviewed-by: Brian Cain <bcain@quicinc.com> Message-Id: <20240115221443.365287-3-ltaylorsimpson@gmail.com> Signed-off-by: Brian Cain <bcain@quicinc.com>
199 lines
6.2 KiB
Python
Executable File
199 lines
6.2 KiB
Python
Executable File
#!/usr/bin/env python3
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##
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## Copyright (c) 2024 Taylor Simpson <ltaylorsimpson@gmail.com>
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; either version 2 of the License, or
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## (at your option) any later version.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, see <http://www.gnu.org/licenses/>.
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##
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import io
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import re
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import sys
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import textwrap
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import iset
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import hex_common
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encs = {
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tag: "".join(reversed(iset.iset[tag]["enc"].replace(" ", "")))
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for tag in iset.tags
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if iset.iset[tag]["enc"] != "MISSING ENCODING"
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}
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regre = re.compile(r"((?<!DUP)[MNORCPQXSGVZA])([stuvwxyzdefg]+)([.]?[LlHh]?)(\d+S?)")
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immre = re.compile(r"[#]([rRsSuUm])(\d+)(?:[:](\d+))?")
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def ordered_unique(l):
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return sorted(set(l), key=l.index)
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num_registers = {"R": 32, "V": 32}
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operand_letters = {
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"P",
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"i",
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"I",
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"r",
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"s",
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"t",
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"u",
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"v",
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"w",
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"x",
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"y",
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"z",
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"d",
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"e",
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"f",
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"g",
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}
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#
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# These instructions have unused operand letters in their encoding
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# They don't correspond to actual operands in the instruction semantics
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# We will mark them as ignored in QEMU decodetree
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#
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tags_with_unused_d_encoding = {
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"R6_release_at_vi",
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"R6_release_st_vi",
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"S4_stored_rl_at_vi",
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"S4_stored_rl_st_vi",
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"S2_storew_rl_at_vi",
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"S2_stored_rl_at_vi",
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"S2_storew_rl_st_vi",
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}
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tags_with_unused_t_encoding = {
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"R6_release_at_vi",
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"R6_release_st_vi",
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}
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def skip_tag(tag, class_to_decode):
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enc_class = iset.iset[tag]["enc_class"]
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return enc_class != class_to_decode
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##
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## Generate the QEMU decodetree file for each instruction in class_to_decode
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## For A2_add: Rd32=add(Rs32,Rt32)
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## We produce:
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## %A2_add_Rd 0:5
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## %A2_add_Rs 16:5
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## %A2_add_Rt 8:5
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## @A2_add 11110011000.......-.....---..... Rd=%A2_add_Rd Rs=%A2_add_Rs Rt=%A2_add_Rt %PP
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## A2_add ..................-.....---..... @A2_add
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##
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def gen_decodetree_file(f, class_to_decode):
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is_subinsn = class_to_decode.startswith("SUBINSN_")
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f.write(f"## DO NOT MODIFY - This file is generated by {sys.argv[0]}\n\n")
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if not is_subinsn:
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f.write("%PP\t14:2\n\n")
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for tag in sorted(encs.keys(), key=iset.tags.index):
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if skip_tag(tag, class_to_decode):
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continue
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enc = encs[tag]
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enc_str = "".join(reversed(encs[tag]))
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f.write(("#" * 80) + "\n"
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f"## {tag}:\t{enc_str}\n"
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"##\n")
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# The subinstructions come with a 13-bit encoding, but
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# decodetree.py needs 16 bits
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if is_subinsn:
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enc_str = "---" + enc_str
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regs = ordered_unique(regre.findall(iset.iset[tag]["syntax"]))
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imms = ordered_unique(immre.findall(iset.iset[tag]["syntax"]))
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# Write the field definitions for the registers
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for regno, reg in enumerate(regs):
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reg_type, reg_id, _, reg_enc_size = reg
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reg_letter = reg_id[0]
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reg_num_choices = int(reg_enc_size.rstrip("S"))
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reg_mapping = reg_type + "".join("_" for letter in reg_id) + \
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reg_enc_size
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reg_enc_fields = re.findall(reg_letter + "+", enc)
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# Check for some errors
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if len(reg_enc_fields) == 0:
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raise Exception(f"{tag} missing register field!")
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if len(reg_enc_fields) > 1:
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raise Exception(f"{tag} has split register field!")
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reg_enc_field = reg_enc_fields[0]
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if 2 ** len(reg_enc_field) != reg_num_choices:
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raise Exception(f"{tag} has incorrect register field width!")
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f.write(f"%{tag}_{reg_type}{reg_id}\t"
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f"{enc.index(reg_enc_field)}:{len(reg_enc_field)}")
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if (reg_type in num_registers and
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reg_num_choices != num_registers[reg_type]):
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f.write(f"\t!function=decode_mapped_reg_{reg_mapping}")
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f.write("\n")
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# Write the field definitions for the immediates
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for imm in imms:
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immno = 1 if imm[0].isupper() else 0
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imm_type = imm[0]
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imm_width = int(imm[1])
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imm_letter = "i" if imm_type.islower() else "I"
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fields = []
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sign_mark = "s" if imm_type.lower() in "sr" else ""
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for m in reversed(list(re.finditer(imm_letter + "+", enc))):
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fields.append(f"{m.start()}:{sign_mark}{m.end() - m.start()}")
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sign_mark = ""
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field_str = " ".join(fields)
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f.write(f"%{tag}_{imm_type}{imm_letter}\t{field_str}\n")
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## Handle instructions with unused encoding letters
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## Change the unused letters to ignored
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if tag in tags_with_unused_d_encoding:
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enc_str = enc_str.replace("d", "-")
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if tag in tags_with_unused_t_encoding:
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enc_str = enc_str.replace("t", "-")
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# Replace the operand letters with .
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for x in operand_letters:
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enc_str = enc_str.replace(x, ".")
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# Write the instruction format
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f.write(f"@{tag}\t{enc_str}")
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for reg in regs:
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reg_type = reg[0]
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reg_id = reg[1]
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f.write(f" {reg_type}{reg_id}=%{tag}_{reg_type}{reg_id}")
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for imm in imms:
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imm_type = imm[0]
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imm_letter = "i" if imm_type.islower() else "I"
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f.write(f" {imm_type}{imm_letter}=%{tag}_{imm_type}{imm_letter}")
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if not is_subinsn:
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f.write(" %PP")
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f.write("\n")
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# Replace the 0s and 1s with .
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enc_str = enc_str.replace("0", ".").replace("1", ".")
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# Write the instruction pattern
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f.write(f"{tag}\t{enc_str} @{tag}\n")
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if __name__ == "__main__":
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hex_common.read_semantics_file(sys.argv[1])
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class_to_decode = sys.argv[2]
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with open(sys.argv[3], "w") as f:
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gen_decodetree_file(f, class_to_decode)
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