qemu/target/riscv
Richard Henderson 3109cd98a6 target/riscv: Use env_cpu, env_archcpu
Cleanup in the boilerplate that each target must define.
Replace riscv_env_get_cpu with env_archcpu.  The combination
CPU(riscv_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-06-10 07:03:42 -07:00
..
insn_trans target/riscv: Split gen_arith_imm into functional and temp 2019-05-24 12:09:23 -07:00
cpu_bits.h target/riscv: Add the HGATP register masks 2019-05-24 12:09:25 -07:00
cpu_helper.c target/riscv: Use env_cpu, env_archcpu 2019-06-10 07:03:42 -07:00
cpu_user.h RISC-V: linux-user support for RVE ABI 2019-03-19 05:14:39 -07:00
cpu-param.h tcg: Split out target/arch/cpu-param.h 2019-06-10 07:03:34 -07:00
cpu.c target/riscv: Add a base 32 and 64 bit CPU 2019-05-24 12:09:23 -07:00
cpu.h target/riscv: Use env_cpu, env_archcpu 2019-06-10 07:03:42 -07:00
csr.c target/riscv: Use env_cpu, env_archcpu 2019-06-10 07:03:42 -07:00
fpu_helper.c RISC-V: Use riscv prefix consistently on cpu helpers 2019-02-11 15:56:21 -08:00
gdbstub.c RISC-V: Add hooks to use the gdb xml files. 2019-03-19 05:13:24 -07:00
helper.h
insn16-32.decode target/riscv: Split RVC32 and RVC64 insns into separate files 2019-05-24 12:09:22 -07:00
insn16-64.decode target/riscv: Add checks for several RVC reserved operands 2019-05-24 12:09:25 -07:00
insn16.decode target/riscv: Add checks for several RVC reserved operands 2019-05-24 12:09:25 -07:00
insn32-64.decode target/riscv: Convert RV64D insns to decodetree 2019-03-13 10:34:06 +01:00
insn32.decode target/riscv: Name the argument sets for all of insn32 formats 2019-05-24 12:09:22 -07:00
instmap.h RISC-V TCG Code Generation 2018-03-07 08:30:28 +13:00
Makefile.objs target/riscv: Split RVC32 and RVC64 insns into separate files 2019-05-24 12:09:22 -07:00
op_helper.c target/riscv: Use env_cpu, env_archcpu 2019-06-10 07:03:42 -07:00
pmp.c riscv: pmp: Log pmp access errors as guest errors 2019-03-19 05:14:38 -07:00
pmp.h Clean up ill-advised or unusual header guards 2019-05-13 08:58:55 +02:00
trace-events RISC-V: Convert trap debugging to trace events 2019-03-19 05:14:40 -07:00
translate.c target/riscv: Split gen_arith_imm into functional and temp 2019-05-24 12:09:23 -07:00