qemu/target/xtensa
Max Filippov 30c2afd151 target/xtensa: fix mapping direction in read/write simcalls
Read and write simcalls map physical memory to access I/O buffers, but
'read' simcall need to map it for writing and 'write' simcall need to
map it for reading, i.e. the opposite of what they do now. Fix that.

Cc: qemu-stable@nongnu.org
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2017-06-06 02:34:04 -07:00
..
core-dc232b
core-dc233c
core-fsf
core-dc232b.c
core-dc233c.c
core-fsf.c
cpu-qom.h
cpu.c target-xtensa: implement RER/WER instructions 2017-01-16 19:19:03 -08:00
cpu.h target/xtensa: sim: instantiate local memories 2017-02-23 10:30:41 -08:00
gdbstub.c
helper.c target/xtensa: hold BQL for interrupt processing 2017-03-09 10:41:43 +00:00
helper.h target/xtensa updates: 2017-01-25 16:36:57 +00:00
import_core.sh target/xtensa: add two missing headers to core import script 2017-02-23 10:50:56 -08:00
Makefile.objs
monitor.c monitor: Fix crashes when using HMP commands without CPU 2017-02-21 18:29:01 +00:00
op_helper.c target/xtensa: hold BQL for interrupt processing 2017-03-09 10:41:43 +00:00
overlay_tool.h target/xtensa: sim: instantiate local memories 2017-02-23 10:30:41 -08:00
translate.c target/xtensa updates: 2017-01-25 16:36:57 +00:00
xtensa-semi.c target/xtensa: fix mapping direction in read/write simcalls 2017-06-06 02:34:04 -07:00