303752a906
Expose "Invariant TSC" flag, if KVM is enabled. From Intel documentation: 17.13.1 Invariant TSC The time stamp counter in newer processors may support an enhancement, referred to as invariant TSC. Processor’s support for invariant TSC is indicated by CPUID.80000007H:EDX[8]. The invariant TSC will run at a constant rate in all ACPI P-, C-. and T-states. This is the architectural behavior moving forward. On processors with invariant TSC support, the OS may use the TSC for wall clock timer services (instead of ACPI or HPET timers). TSC reads are much more efficient and do not incur the overhead associated with a ring transition or access to a platform resource. Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com> [ehabkost: redo feature filtering to use .tcg_features] [ehabkost: add CPUID_APM_INVTSC macro, add it to .unmigratable_flags] Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de> |
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.. | ||
arch_dump.c | ||
arch_memory_mapping.c | ||
cc_helper_template.h | ||
cc_helper.c | ||
cpu-qom.h | ||
cpu.c | ||
cpu.h | ||
excp_helper.c | ||
fpu_helper.c | ||
gdbstub.c | ||
helper.c | ||
helper.h | ||
int_helper.c | ||
ioport-user.c | ||
kvm_i386.h | ||
kvm-stub.c | ||
kvm.c | ||
machine.c | ||
Makefile.objs | ||
mem_helper.c | ||
misc_helper.c | ||
ops_sse_header.h | ||
ops_sse.h | ||
seg_helper.c | ||
shift_helper_template.h | ||
smm_helper.c | ||
svm_helper.c | ||
svm.h | ||
TODO | ||
topology.h | ||
translate.c |