qemu/include/exec
Peter Maydell f7b78602fd accel/tcg: Add cluster number to TCG TB hash
Include the cluster number in the hash we use to look
up TBs. This is important because a TB that is valid
for one cluster at a given physical address and set
of CPU flags is not necessarily valid for another:
the two clusters may have different views of physical
memory, or may have different CPU features (eg FPU
present or absent).

We put the cluster number in the high 8 bits of the
TB cflags. This gives us up to 256 clusters, which should
be enough for anybody. If we ever need more, or need
more bits in cflags for other purposes, we could make
tb_hash_func() take more data (and expand qemu_xxhash7()
to qemu_xxhash8()).

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id: 20190121152218.9592-4-peter.maydell@linaro.org
2019-01-29 11:46:06 +00:00
..
user
address-spaces.h
cpu_ldst_template.h cputlb: read CPUTLBEntry.addr_write atomically 2018-10-18 19:46:53 -07:00
cpu_ldst_useronly_template.h linux-user: fix 32bit g2h()/h2g() 2018-08-17 13:56:33 +02:00
cpu_ldst.h cputlb: Remove static tlb sizing 2019-01-28 07:04:35 -08:00
cpu-all.h tcg: Define and use new tlb_hit() and tlb_hit_page() functions 2018-07-02 08:02:20 -07:00
cpu-common.h Rename cpu_physical_memory_write_rom() to address_space_write_rom() 2018-12-14 13:30:48 +00:00
cpu-defs.h cputlb: Remove static tlb sizing 2019-01-28 07:04:35 -08:00
cputlb.h cputlb: Count "partial" and "elided" tlb flushes 2018-10-31 12:16:30 +00:00
exec-all.h accel/tcg: Add cluster number to TCG TB hash 2019-01-29 11:46:06 +00:00
gdbstub.h
gen-icount.h
helper-gen.h
helper-head.h tcg: Add TCG_CALL_NO_RETURN 2018-12-26 06:40:24 +11:00
helper-proto.h
helper-tcg.h tcg: Add TCG_CALL_NO_RETURN 2018-12-26 06:40:24 +11:00
hwaddr.h
ioport.h
log.h
memattrs.h
memory_ldst_cached.inc.h
memory_ldst_phys.inc.h
memory_ldst.inc.h
memory-internal.h tcg: remove tb_lock 2018-06-15 08:18:48 -10:00
memory.h memory: add memory_region_flush_rom_device() 2019-01-29 11:46:04 +00:00
poison.h exec: Add RISC-V GCC poison macro 2018-12-26 06:40:02 +11:00
ram_addr.h COLO: Load dirty pages into SVM's RAM cache firstly 2018-10-19 11:15:03 +08:00
ramlist.h
semihost.h
softmmu-semi.h
target_page.h
tb-context.h tcg: remove tb_lock 2018-06-15 08:18:48 -10:00
tb-hash.h include: move exec/tb-hash-xx.h to qemu/xxhash.h 2018-12-17 06:04:44 +03:00
tb-lookup.h
translator.h