Laurent Vivier 2f77995ceb target/m68k: add fsglmul and fsgldiv ... fsglmul and fsgldiv truncate data to single precision before computing results. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <rth@twiddle.net> Message-Id: <20170628204241.32106-6-laurent@vivier.eu>		2017-06-29 20:28:22 +02:00
..
alpha	target/alpha: Use tcg_gen_lookup_and_goto_ptr	2017-06-19 11:11:25 -07:00
arm	target/arm: Exit after clearing aarch64 interrupt mask	2017-06-19 11:11:26 -07:00
cris	qom/cpu: move tlb_flush to cpu_common_reset	2017-01-13 14:24:31 +00:00
hppa	target/hppa: Use tcg_gen_lookup_and_goto_ptr	2017-06-05 09:25:42 -07:00
i386	QAPI patches for 2017-06-09	2017-06-22 11:34:39 +01:00
lm32	qom/cpu: move tlb_flush to cpu_common_reset	2017-01-13 14:24:31 +00:00
m68k	target/m68k: add fsglmul and fsgldiv	2017-06-29 20:28:22 +02:00
microblaze	cputlb: drop flush_global flag from tlb_flush	2017-01-13 14:24:37 +00:00
mips	target/mips: optimize indirect branches	2017-06-05 09:25:42 -07:00
moxie	qom/cpu: move tlb_flush to cpu_common_reset	2017-01-13 14:24:31 +00:00
nios2	target/nios2: Fix 64-bit ilp32 compilation	2017-06-05 09:25:42 -07:00
openrisc	target/openrisc: Support non-busy idle state using PMR SPR	2017-05-04 09:39:14 +09:00
ppc	target/ppc: fix memory leak in kvmppc_is_mem_backend_page_size_ok()	2017-06-08 11:05:31 +10:00
s390x	target/s390x: Exit after changing PSW mask	2017-06-19 11:11:25 -07:00
sh4	target/sh4: fix RTE instruction delay slot	2017-05-30 21:00:56 +02:00
sparc	shutdown: Add source information to SHUTDOWN and RESET	2017-05-23 13:28:17 +02:00
tilegx	migration: Remove unneeded includes of migration/vmstate.h	2017-06-01 18:49:22 +02:00
tricore	qom/cpu: move tlb_flush to cpu_common_reset	2017-01-13 14:24:31 +00:00
unicore32	cputlb: drop flush_global flag from tlb_flush	2017-01-13 14:24:37 +00:00
xtensa	target/xtensa: handle unknown registers in gdbstub	2017-06-06 02:40:48 -07:00