2ef6175aa7
Rather than include helper.h with N values of GEN_HELPER, include a secondary file that sets up the macros to include helper.h. This minimizes the files that must be rebuilt when changing the macros for file N. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
658 lines
14 KiB
C
658 lines
14 KiB
C
/*
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* CRIS helper routines
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*
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* Copyright (c) 2007 AXIS Communications
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* Written by Edgar E. Iglesias
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "cpu.h"
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#include "mmu.h"
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#include "exec/helper-proto.h"
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#include "qemu/host-utils.h"
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//#define CRIS_OP_HELPER_DEBUG
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#ifdef CRIS_OP_HELPER_DEBUG
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#define D(x) x
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#define D_LOG(...) qemu_log(__VA_ARGS__)
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#else
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#define D(x)
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#define D_LOG(...) do { } while (0)
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#endif
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#if !defined(CONFIG_USER_ONLY)
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#include "exec/softmmu_exec.h"
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#define MMUSUFFIX _mmu
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#define SHIFT 0
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#include "exec/softmmu_template.h"
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#define SHIFT 1
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#include "exec/softmmu_template.h"
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#define SHIFT 2
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#include "exec/softmmu_template.h"
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#define SHIFT 3
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#include "exec/softmmu_template.h"
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/* Try to fill the TLB and return an exception if error. If retaddr is
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NULL, it means that the function was called in C code (i.e. not
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from generated code or from helper.c) */
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void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx,
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uintptr_t retaddr)
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{
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CRISCPU *cpu = CRIS_CPU(cs);
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CPUCRISState *env = &cpu->env;
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int ret;
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D_LOG("%s pc=%x tpc=%x ra=%p\n", __func__,
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env->pc, env->pregs[PR_EDA], (void *)retaddr);
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ret = cris_cpu_handle_mmu_fault(cs, addr, is_write, mmu_idx);
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if (unlikely(ret)) {
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if (retaddr) {
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/* now we have a real cpu fault */
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if (cpu_restore_state(cs, retaddr)) {
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/* Evaluate flags after retranslation. */
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helper_top_evaluate_flags(env);
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}
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}
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cpu_loop_exit(cs);
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}
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}
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#endif
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void helper_raise_exception(CPUCRISState *env, uint32_t index)
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{
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CPUState *cs = CPU(cris_env_get_cpu(env));
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cs->exception_index = index;
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cpu_loop_exit(cs);
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}
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void helper_tlb_flush_pid(CPUCRISState *env, uint32_t pid)
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{
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#if !defined(CONFIG_USER_ONLY)
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pid &= 0xff;
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if (pid != (env->pregs[PR_PID] & 0xff))
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cris_mmu_flush_pid(env, env->pregs[PR_PID]);
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#endif
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}
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void helper_spc_write(CPUCRISState *env, uint32_t new_spc)
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{
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#if !defined(CONFIG_USER_ONLY)
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CRISCPU *cpu = cris_env_get_cpu(env);
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CPUState *cs = CPU(cpu);
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tlb_flush_page(cs, env->pregs[PR_SPC]);
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tlb_flush_page(cs, new_spc);
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#endif
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}
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void helper_dump(uint32_t a0, uint32_t a1, uint32_t a2)
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{
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qemu_log("%s: a0=%x a1=%x\n", __func__, a0, a1);
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}
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/* Used by the tlb decoder. */
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#define EXTRACT_FIELD(src, start, end) \
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(((src) >> start) & ((1 << (end - start + 1)) - 1))
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void helper_movl_sreg_reg(CPUCRISState *env, uint32_t sreg, uint32_t reg)
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{
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#if !defined(CONFIG_USER_ONLY)
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CRISCPU *cpu = cris_env_get_cpu(env);
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#endif
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uint32_t srs;
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srs = env->pregs[PR_SRS];
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srs &= 3;
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env->sregs[srs][sreg] = env->regs[reg];
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#if !defined(CONFIG_USER_ONLY)
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if (srs == 1 || srs == 2) {
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if (sreg == 6) {
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/* Writes to tlb-hi write to mm_cause as a side
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effect. */
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env->sregs[SFR_RW_MM_TLB_HI] = env->regs[reg];
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env->sregs[SFR_R_MM_CAUSE] = env->regs[reg];
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}
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else if (sreg == 5) {
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uint32_t set;
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uint32_t idx;
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uint32_t lo, hi;
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uint32_t vaddr;
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int tlb_v;
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idx = set = env->sregs[SFR_RW_MM_TLB_SEL];
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set >>= 4;
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set &= 3;
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idx &= 15;
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/* We've just made a write to tlb_lo. */
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lo = env->sregs[SFR_RW_MM_TLB_LO];
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/* Writes are done via r_mm_cause. */
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hi = env->sregs[SFR_R_MM_CAUSE];
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vaddr = EXTRACT_FIELD(env->tlbsets[srs-1][set][idx].hi,
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13, 31);
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vaddr <<= TARGET_PAGE_BITS;
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tlb_v = EXTRACT_FIELD(env->tlbsets[srs-1][set][idx].lo,
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3, 3);
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env->tlbsets[srs - 1][set][idx].lo = lo;
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env->tlbsets[srs - 1][set][idx].hi = hi;
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D_LOG("tlb flush vaddr=%x v=%d pc=%x\n",
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vaddr, tlb_v, env->pc);
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if (tlb_v) {
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tlb_flush_page(CPU(cpu), vaddr);
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}
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}
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}
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#endif
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}
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void helper_movl_reg_sreg(CPUCRISState *env, uint32_t reg, uint32_t sreg)
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{
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uint32_t srs;
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env->pregs[PR_SRS] &= 3;
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srs = env->pregs[PR_SRS];
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#if !defined(CONFIG_USER_ONLY)
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if (srs == 1 || srs == 2)
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{
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uint32_t set;
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uint32_t idx;
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uint32_t lo, hi;
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idx = set = env->sregs[SFR_RW_MM_TLB_SEL];
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set >>= 4;
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set &= 3;
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idx &= 15;
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/* Update the mirror regs. */
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hi = env->tlbsets[srs - 1][set][idx].hi;
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lo = env->tlbsets[srs - 1][set][idx].lo;
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env->sregs[SFR_RW_MM_TLB_HI] = hi;
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env->sregs[SFR_RW_MM_TLB_LO] = lo;
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}
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#endif
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env->regs[reg] = env->sregs[srs][sreg];
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}
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static void cris_ccs_rshift(CPUCRISState *env)
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{
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uint32_t ccs;
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/* Apply the ccs shift. */
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ccs = env->pregs[PR_CCS];
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ccs = (ccs & 0xc0000000) | ((ccs & 0x0fffffff) >> 10);
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if (ccs & U_FLAG)
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{
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/* Enter user mode. */
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env->ksp = env->regs[R_SP];
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env->regs[R_SP] = env->pregs[PR_USP];
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}
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env->pregs[PR_CCS] = ccs;
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}
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void helper_rfe(CPUCRISState *env)
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{
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int rflag = env->pregs[PR_CCS] & R_FLAG;
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D_LOG("rfe: erp=%x pid=%x ccs=%x btarget=%x\n",
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env->pregs[PR_ERP], env->pregs[PR_PID],
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env->pregs[PR_CCS],
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env->btarget);
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cris_ccs_rshift(env);
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/* RFE sets the P_FLAG only if the R_FLAG is not set. */
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if (!rflag)
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env->pregs[PR_CCS] |= P_FLAG;
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}
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void helper_rfn(CPUCRISState *env)
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{
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int rflag = env->pregs[PR_CCS] & R_FLAG;
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D_LOG("rfn: erp=%x pid=%x ccs=%x btarget=%x\n",
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env->pregs[PR_ERP], env->pregs[PR_PID],
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env->pregs[PR_CCS],
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env->btarget);
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cris_ccs_rshift(env);
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/* Set the P_FLAG only if the R_FLAG is not set. */
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if (!rflag)
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env->pregs[PR_CCS] |= P_FLAG;
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/* Always set the M flag. */
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env->pregs[PR_CCS] |= M_FLAG_V32;
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}
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uint32_t helper_lz(uint32_t t0)
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{
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return clz32(t0);
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}
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uint32_t helper_btst(CPUCRISState *env, uint32_t t0, uint32_t t1, uint32_t ccs)
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{
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/* FIXME: clean this up. */
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/* des ref:
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The N flag is set according to the selected bit in the dest reg.
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The Z flag is set if the selected bit and all bits to the right are
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zero.
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The X flag is cleared.
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Other flags are left untouched.
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The destination reg is not affected.*/
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unsigned int fz, sbit, bset, mask, masked_t0;
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sbit = t1 & 31;
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bset = !!(t0 & (1 << sbit));
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mask = sbit == 31 ? -1 : (1 << (sbit + 1)) - 1;
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masked_t0 = t0 & mask;
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fz = !(masked_t0 | bset);
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/* Clear the X, N and Z flags. */
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ccs = ccs & ~(X_FLAG | N_FLAG | Z_FLAG);
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if (env->pregs[PR_VR] < 32)
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ccs &= ~(V_FLAG | C_FLAG);
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/* Set the N and Z flags accordingly. */
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ccs |= (bset << 3) | (fz << 2);
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return ccs;
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}
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static inline uint32_t evaluate_flags_writeback(CPUCRISState *env,
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uint32_t flags, uint32_t ccs)
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{
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unsigned int x, z, mask;
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/* Extended arithmetics, leave the z flag alone. */
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x = env->cc_x;
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mask = env->cc_mask | X_FLAG;
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if (x) {
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z = flags & Z_FLAG;
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mask = mask & ~z;
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}
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flags &= mask;
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/* all insn clear the x-flag except setf or clrf. */
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ccs &= ~mask;
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ccs |= flags;
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return ccs;
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}
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uint32_t helper_evaluate_flags_muls(CPUCRISState *env,
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uint32_t ccs, uint32_t res, uint32_t mof)
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{
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uint32_t flags = 0;
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int64_t tmp;
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int dneg;
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dneg = ((int32_t)res) < 0;
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tmp = mof;
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tmp <<= 32;
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tmp |= res;
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if (tmp == 0)
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flags |= Z_FLAG;
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else if (tmp < 0)
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flags |= N_FLAG;
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if ((dneg && mof != -1)
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|| (!dneg && mof != 0))
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flags |= V_FLAG;
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return evaluate_flags_writeback(env, flags, ccs);
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}
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uint32_t helper_evaluate_flags_mulu(CPUCRISState *env,
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uint32_t ccs, uint32_t res, uint32_t mof)
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{
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uint32_t flags = 0;
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uint64_t tmp;
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tmp = mof;
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tmp <<= 32;
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tmp |= res;
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if (tmp == 0)
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flags |= Z_FLAG;
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else if (tmp >> 63)
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flags |= N_FLAG;
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if (mof)
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flags |= V_FLAG;
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return evaluate_flags_writeback(env, flags, ccs);
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}
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uint32_t helper_evaluate_flags_mcp(CPUCRISState *env, uint32_t ccs,
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uint32_t src, uint32_t dst, uint32_t res)
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{
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uint32_t flags = 0;
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src = src & 0x80000000;
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dst = dst & 0x80000000;
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if ((res & 0x80000000L) != 0L)
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{
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flags |= N_FLAG;
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if (!src && !dst)
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flags |= V_FLAG;
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else if (src & dst)
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flags |= R_FLAG;
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}
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else
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{
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if (res == 0L)
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flags |= Z_FLAG;
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if (src & dst)
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flags |= V_FLAG;
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if (dst | src)
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flags |= R_FLAG;
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}
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return evaluate_flags_writeback(env, flags, ccs);
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}
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uint32_t helper_evaluate_flags_alu_4(CPUCRISState *env, uint32_t ccs,
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uint32_t src, uint32_t dst, uint32_t res)
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{
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uint32_t flags = 0;
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src = src & 0x80000000;
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dst = dst & 0x80000000;
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if ((res & 0x80000000L) != 0L)
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{
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flags |= N_FLAG;
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if (!src && !dst)
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flags |= V_FLAG;
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else if (src & dst)
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flags |= C_FLAG;
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}
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else
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{
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if (res == 0L)
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flags |= Z_FLAG;
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if (src & dst)
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flags |= V_FLAG;
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if (dst | src)
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flags |= C_FLAG;
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}
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return evaluate_flags_writeback(env, flags, ccs);
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}
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uint32_t helper_evaluate_flags_sub_4(CPUCRISState *env, uint32_t ccs,
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uint32_t src, uint32_t dst, uint32_t res)
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{
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uint32_t flags = 0;
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src = (~src) & 0x80000000;
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dst = dst & 0x80000000;
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if ((res & 0x80000000L) != 0L)
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{
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flags |= N_FLAG;
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if (!src && !dst)
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flags |= V_FLAG;
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else if (src & dst)
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flags |= C_FLAG;
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}
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else
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{
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if (res == 0L)
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flags |= Z_FLAG;
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if (src & dst)
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flags |= V_FLAG;
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if (dst | src)
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flags |= C_FLAG;
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}
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flags ^= C_FLAG;
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return evaluate_flags_writeback(env, flags, ccs);
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}
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uint32_t helper_evaluate_flags_move_4(CPUCRISState *env,
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uint32_t ccs, uint32_t res)
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{
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uint32_t flags = 0;
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if ((int32_t)res < 0)
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flags |= N_FLAG;
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else if (res == 0L)
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flags |= Z_FLAG;
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return evaluate_flags_writeback(env, flags, ccs);
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}
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uint32_t helper_evaluate_flags_move_2(CPUCRISState *env,
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uint32_t ccs, uint32_t res)
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{
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uint32_t flags = 0;
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if ((int16_t)res < 0L)
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flags |= N_FLAG;
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else if (res == 0)
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flags |= Z_FLAG;
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return evaluate_flags_writeback(env, flags, ccs);
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}
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/* TODO: This is expensive. We could split things up and only evaluate part of
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CCR on a need to know basis. For now, we simply re-evaluate everything. */
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void helper_evaluate_flags(CPUCRISState *env)
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{
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uint32_t src, dst, res;
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uint32_t flags = 0;
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src = env->cc_src;
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dst = env->cc_dest;
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res = env->cc_result;
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if (env->cc_op == CC_OP_SUB || env->cc_op == CC_OP_CMP)
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src = ~src;
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/* Now, evaluate the flags. This stuff is based on
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Per Zander's CRISv10 simulator. */
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switch (env->cc_size)
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{
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case 1:
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if ((res & 0x80L) != 0L)
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{
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flags |= N_FLAG;
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if (((src & 0x80L) == 0L)
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&& ((dst & 0x80L) == 0L))
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{
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flags |= V_FLAG;
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}
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else if (((src & 0x80L) != 0L)
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&& ((dst & 0x80L) != 0L))
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{
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flags |= C_FLAG;
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}
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}
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else
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{
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if ((res & 0xFFL) == 0L)
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{
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flags |= Z_FLAG;
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}
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if (((src & 0x80L) != 0L)
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&& ((dst & 0x80L) != 0L))
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{
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flags |= V_FLAG;
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}
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if ((dst & 0x80L) != 0L
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|| (src & 0x80L) != 0L)
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{
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flags |= C_FLAG;
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}
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}
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break;
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case 2:
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if ((res & 0x8000L) != 0L)
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{
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flags |= N_FLAG;
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if (((src & 0x8000L) == 0L)
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&& ((dst & 0x8000L) == 0L))
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{
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flags |= V_FLAG;
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}
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else if (((src & 0x8000L) != 0L)
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&& ((dst & 0x8000L) != 0L))
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{
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flags |= C_FLAG;
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}
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}
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else
|
|
{
|
|
if ((res & 0xFFFFL) == 0L)
|
|
{
|
|
flags |= Z_FLAG;
|
|
}
|
|
if (((src & 0x8000L) != 0L)
|
|
&& ((dst & 0x8000L) != 0L))
|
|
{
|
|
flags |= V_FLAG;
|
|
}
|
|
if ((dst & 0x8000L) != 0L
|
|
|| (src & 0x8000L) != 0L)
|
|
{
|
|
flags |= C_FLAG;
|
|
}
|
|
}
|
|
break;
|
|
case 4:
|
|
if ((res & 0x80000000L) != 0L)
|
|
{
|
|
flags |= N_FLAG;
|
|
if (((src & 0x80000000L) == 0L)
|
|
&& ((dst & 0x80000000L) == 0L))
|
|
{
|
|
flags |= V_FLAG;
|
|
}
|
|
else if (((src & 0x80000000L) != 0L) &&
|
|
((dst & 0x80000000L) != 0L))
|
|
{
|
|
flags |= C_FLAG;
|
|
}
|
|
}
|
|
else
|
|
{
|
|
if (res == 0L)
|
|
flags |= Z_FLAG;
|
|
if (((src & 0x80000000L) != 0L)
|
|
&& ((dst & 0x80000000L) != 0L))
|
|
flags |= V_FLAG;
|
|
if ((dst & 0x80000000L) != 0L
|
|
|| (src & 0x80000000L) != 0L)
|
|
flags |= C_FLAG;
|
|
}
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
|
|
if (env->cc_op == CC_OP_SUB || env->cc_op == CC_OP_CMP)
|
|
flags ^= C_FLAG;
|
|
|
|
env->pregs[PR_CCS] = evaluate_flags_writeback(env, flags,
|
|
env->pregs[PR_CCS]);
|
|
}
|
|
|
|
void helper_top_evaluate_flags(CPUCRISState *env)
|
|
{
|
|
switch (env->cc_op)
|
|
{
|
|
case CC_OP_MCP:
|
|
env->pregs[PR_CCS] = helper_evaluate_flags_mcp(env,
|
|
env->pregs[PR_CCS], env->cc_src,
|
|
env->cc_dest, env->cc_result);
|
|
break;
|
|
case CC_OP_MULS:
|
|
env->pregs[PR_CCS] = helper_evaluate_flags_muls(env,
|
|
env->pregs[PR_CCS], env->cc_result,
|
|
env->pregs[PR_MOF]);
|
|
break;
|
|
case CC_OP_MULU:
|
|
env->pregs[PR_CCS] = helper_evaluate_flags_mulu(env,
|
|
env->pregs[PR_CCS], env->cc_result,
|
|
env->pregs[PR_MOF]);
|
|
break;
|
|
case CC_OP_MOVE:
|
|
case CC_OP_AND:
|
|
case CC_OP_OR:
|
|
case CC_OP_XOR:
|
|
case CC_OP_ASR:
|
|
case CC_OP_LSR:
|
|
case CC_OP_LSL:
|
|
switch (env->cc_size)
|
|
{
|
|
case 4:
|
|
env->pregs[PR_CCS] =
|
|
helper_evaluate_flags_move_4(env,
|
|
env->pregs[PR_CCS],
|
|
env->cc_result);
|
|
break;
|
|
case 2:
|
|
env->pregs[PR_CCS] =
|
|
helper_evaluate_flags_move_2(env,
|
|
env->pregs[PR_CCS],
|
|
env->cc_result);
|
|
break;
|
|
default:
|
|
helper_evaluate_flags(env);
|
|
break;
|
|
}
|
|
break;
|
|
case CC_OP_FLAGS:
|
|
/* live. */
|
|
break;
|
|
case CC_OP_SUB:
|
|
case CC_OP_CMP:
|
|
if (env->cc_size == 4)
|
|
env->pregs[PR_CCS] =
|
|
helper_evaluate_flags_sub_4(env,
|
|
env->pregs[PR_CCS],
|
|
env->cc_src, env->cc_dest,
|
|
env->cc_result);
|
|
else
|
|
helper_evaluate_flags(env);
|
|
break;
|
|
default:
|
|
{
|
|
switch (env->cc_size)
|
|
{
|
|
case 4:
|
|
env->pregs[PR_CCS] =
|
|
helper_evaluate_flags_alu_4(env,
|
|
env->pregs[PR_CCS],
|
|
env->cc_src, env->cc_dest,
|
|
env->cc_result);
|
|
break;
|
|
default:
|
|
helper_evaluate_flags(env);
|
|
break;
|
|
}
|
|
}
|
|
break;
|
|
}
|
|
}
|