David Hildenbrand 2e96005ed8 s390x/tcg: Implement 64 bit for VECTOR FP LOAD LENGTHENED ...

64 bit -> 128 bit, there is only a single final element.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Hildenbrand <david@redhat.com>
Message-Id: <20210608092337.12221-18-david@redhat.com>
Signed-off-by: Cornelia Huck <cohuck@redhat.com>

2021-06-21 08:48:21 +02:00

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alpha

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arm

bitops.h: Provide hswap32(), hswap64(), wswap64() swapping operations

2021-06-16 14:33:52 +01:00

avr

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cris

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hexagon

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hppa

target/hppa: Remove unused 'memory.h' header

2021-06-05 21:23:14 +02:00

i386

target/i386: Added Intercept CR0 writes check

2021-06-16 15:02:41 +02:00

m68k

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microblaze

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mips

target/mips: Fix 'Uncoditional' typo

2021-06-05 21:28:54 +02:00

nios2

target/nios2: fix page-fit instruction count

2021-06-05 21:17:10 +02:00

openrisc

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ppc

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riscv

target/riscv: rvb: add b-ext version cpu option

2021-06-08 09:59:46 +10:00

rx

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s390x

s390x/tcg: Implement 64 bit for VECTOR FP LOAD LENGTHENED

2021-06-21 08:48:21 +02:00

sh4

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sparc

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tricore

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xtensa

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meson.build

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