d27e82f7d0
Convert the VFM[AS]L (scalar) insns in the 2reg-scalar-ext group to decodetree. These are the last ones in the group so we can remove all the legacy decode for the group. Note that in disas_thumb2_insn() the parts of this encoding space where the decodetree decoder returns false will correctly be directed to illegal_op by the "(insn & (1 << 28))" check so they won't fall into disas_coproc_insn() by mistake. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200430181003.21682-11-peter.maydell@linaro.org
67 lines
2.4 KiB
Plaintext
67 lines
2.4 KiB
Plaintext
# AArch32 Neon instruction descriptions
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#
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# Copyright (c) 2020 Linaro, Ltd
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#
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# This library is free software; you can redistribute it and/or
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# modify it under the terms of the GNU Lesser General Public
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# License as published by the Free Software Foundation; either
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# version 2 of the License, or (at your option) any later version.
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#
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# This library is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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# Lesser General Public License for more details.
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#
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# You should have received a copy of the GNU Lesser General Public
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# License along with this library; if not, see <http://www.gnu.org/licenses/>.
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#
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# This file is processed by scripts/decodetree.py
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#
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# Encodings for Neon instructions whose encoding is the same for
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# both A32 and T32.
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# More specifically, this covers:
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# 2reg scalar ext: 0b1111_1110_xxxx_xxxx_xxxx_1x0x_xxxx_xxxx
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# 3same ext: 0b1111_110x_xxxx_xxxx_xxxx_1x0x_xxxx_xxxx
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# VFP/Neon register fields; same as vfp.decode
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%vm_dp 5:1 0:4
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%vm_sp 0:4 5:1
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%vn_dp 7:1 16:4
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%vn_sp 16:4 7:1
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%vd_dp 22:1 12:4
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%vd_sp 12:4 22:1
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VCMLA 1111 110 rot:2 . 1 size:1 .... .... 1000 . q:1 . 0 .... \
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vm=%vm_dp vn=%vn_dp vd=%vd_dp
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VCADD 1111 110 rot:1 1 . 0 size:1 .... .... 1000 . q:1 . 0 .... \
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vm=%vm_dp vn=%vn_dp vd=%vd_dp
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# VUDOT and VSDOT
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VDOT 1111 110 00 . 10 .... .... 1101 . q:1 . u:1 .... \
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vm=%vm_dp vn=%vn_dp vd=%vd_dp
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# VFM[AS]L
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VFML 1111 110 0 s:1 . 10 .... .... 1000 . 0 . 1 .... \
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vm=%vm_sp vn=%vn_sp vd=%vd_dp q=0
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VFML 1111 110 0 s:1 . 10 .... .... 1000 . 1 . 1 .... \
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vm=%vm_dp vn=%vn_dp vd=%vd_dp q=1
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VCMLA_scalar 1111 1110 0 . rot:2 .... .... 1000 . q:1 index:1 0 vm:4 \
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vn=%vn_dp vd=%vd_dp size=0
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VCMLA_scalar 1111 1110 1 . rot:2 .... .... 1000 . q:1 . 0 .... \
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vm=%vm_dp vn=%vn_dp vd=%vd_dp size=1 index=0
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VDOT_scalar 1111 1110 0 . 10 .... .... 1101 . q:1 index:1 u:1 rm:4 \
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vm=%vm_dp vn=%vn_dp vd=%vd_dp
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%vfml_scalar_q0_rm 0:3 5:1
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%vfml_scalar_q1_index 5:1 3:1
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VFML_scalar 1111 1110 0 . 0 s:1 .... .... 1000 . 0 . 1 index:1 ... \
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rm=%vfml_scalar_q0_rm vn=%vn_sp vd=%vd_dp q=0
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VFML_scalar 1111 1110 0 . 0 s:1 .... .... 1000 . 1 . 1 . rm:3 \
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index=%vfml_scalar_q1_index vn=%vn_dp vd=%vd_dp q=1
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