qemu/hw/pci
Philippe Mathieu-Daudé 2dc48da255 hw/pci/pci_bridge: Correct pci_bridge_io memory region size
memory_region_set_size() handle the 16 Exabytes limit by
special-casing the UINT64_MAX value. This is not a problem
for the 32-bit maximum, 4 GiB.
By using the UINT32_MAX value, the pci_bridge_io MemoryRegion
ends up missing 1 byte:

  (qemu) info mtree
  memory-region: pci_bridge_io
    0000000000000000-00000000fffffffe (prio 0, i/o): pci_bridge_io
      0000000000000060-0000000000000060 (prio 0, i/o): i8042-data
      0000000000000064-0000000000000064 (prio 0, i/o): i8042-cmd
      00000000000001ce-00000000000001d1 (prio 0, i/o): vbe
      0000000000000378-000000000000037f (prio 0, i/o): parallel
      00000000000003b4-00000000000003b5 (prio 0, i/o): vga
      ...

Fix by using the correct value. We now have:

  memory-region: pci_bridge_io
    0000000000000000-00000000ffffffff (prio 0, i/o): pci_bridge_io
      0000000000000060-0000000000000060 (prio 0, i/o): i8042-data
      0000000000000064-0000000000000064 (prio 0, i/o): i8042-cmd
      ...

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20200601142930.29408-4-f4bug@amsat.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2020-06-09 14:18:04 -04:00
..
Kconfig
Makefile.objs
msi.c
msix.c msix: allow qword MSI-X table accesses 2020-06-09 09:31:34 -04:00
pci_bridge.c hw/pci/pci_bridge: Correct pci_bridge_io memory region size 2020-06-09 14:18:04 -04:00
pci_host.c
pci-stub.c
pci.c pci: assert configuration access is within bounds 2020-06-09 14:18:04 -04:00
pcie_aer.c
pcie_host.c
pcie_port.c
pcie.c hw/pci/pcie: Move hot plug capability check to pre_plug callback 2020-06-09 14:18:04 -04:00
shpc.c
slotid_cap.c
trace-events