qemu/target
Peter Maydell 2daf518dd1 target/arm: Don't report Statistical Profiling Extension in ID registers
The newly added neoverse-n1 CPU has ID register values which indicate
the presence of the Statistical Profiling Extension, because the real
hardware has this feature.  QEMU's TCG emulation does not yet
implement SPE, though (not even as a minimal stub implementation), so
guests will crash if they try to use it because the SPE system
registers don't exist.

Force ID_AA64DFR0_EL1.PMSVer to 0 in CPU realize for TCG, so that
we don't advertise to the guest a feature that doesn't exist.

(We could alternatively do this by editing the value that
aarch64_neoverse_n1_initfn() sets for this ID register, but
suppressing the field in realize means we won't re-introduce this bug
when we add other CPUs that have SPE in hardware, such as the
Neoverse-V1.)

An example of a non-booting guest is current mainline Linux (5.19),
when booting in EL2 on the virt board (ie with -machine
virtualization=on).

Reported-by: Zenghui Yu <yuzenghui@huawei.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Zenghui Yu <yuzenghui@huawei.com>
Message-id: 20220811131127.947334-1-peter.maydell@linaro.org
2022-08-12 11:17:35 +01:00
..
alpha Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
arm target/arm: Don't report Statistical Profiling Extension in ID registers 2022-08-12 11:17:35 +01:00
avr target/avr: Drop avr_cpu_memory_rw_debug() 2022-06-20 13:11:36 -07:00
cris Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
hexagon Hexagon (target/hexagon) make VyV operands use a unique temp 2022-07-31 16:22:09 -07:00
hppa Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
i386 target/i386: display deprecation status in '-cpu help' 2022-08-05 16:18:15 +01:00
loongarch target/loongarch: Remove cpu_fcsr0 2022-08-08 19:42:53 -07:00
m68k target/m68k: Make semihosting system only 2022-06-28 10:13:22 +05:30
microblaze Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
mips target/mips: Handle lock_user() failure in UHI_plog semihosting call 2022-08-08 23:22:36 +02:00
nios2 target/nios2: Move nios2-semi.c to nios2_softmmu_ss 2022-06-28 10:18:57 +05:30
openrisc OpenRISC Fixes for 7.0 2022-05-15 16:56:27 -07:00
ppc ppc: Remove redundant macro MSR_BOOK3S_MASK. 2022-08-04 13:48:27 +02:00
riscv RISC-V: Allow both Zmmul and M 2022-07-27 17:34:02 +10:00
rx Fix usp/isp swapping upon clrpsw/setpsw. 2022-04-21 16:45:41 -07:00
s390x target/s390x: display deprecation status in '-cpu help' 2022-08-05 16:18:15 +01:00
sh4 Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
sparc Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
tricore Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
xtensa Clean up decorations and whitespace around header guards 2022-05-11 16:50:32 +02:00
Kconfig hw/loongarch: Add support loongson3 virt machine type. 2022-06-06 18:09:03 +00:00
meson.build target/loongarch: Add target build suport 2022-06-06 18:09:03 +00:00