2da95fd88b
The SMC controller on the Aspeed SoC has a set of registers to configure the mapping of each flash module in the SoC address space. These mapping windows are configurable even though no SPI slave is attached to the controller. Also rewrite a bit the comments in the code on this topic. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Message-id: 1474977462-28032-6-git-send-email-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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aspeed_smc.c | ||
imx_spi.c | ||
Makefile.objs | ||
omap_spi.c | ||
pl022.c | ||
ssi.c | ||
stm32f2xx_spi.c | ||
xilinx_spi.c | ||
xilinx_spips.c |