2d4ab117be
Introduce the parallel logic opcodes: - PAND (Parallel AND) - POR (Parallel OR) - PXOR (Parallel XOR) - PNOR (Parallel NOR) Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210214175912.732946-16-f4bug@amsat.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
44 lines
1.7 KiB
Plaintext
44 lines
1.7 KiB
Plaintext
# Toshiba C790's instruction set
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#
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# Copyright (C) 2021 Philippe Mathieu-Daudé
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#
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# SPDX-License-Identifier: LGPL-2.1-or-later
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#
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# Toshiba Appendix B C790-Specific Instruction Set Details
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###########################################################################
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# Named attribute sets. These are used to make nice(er) names
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# when creating helpers common to those for the individual
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# instruction patterns.
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&rtype rs rt rd sa
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###########################################################################
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# Named instruction formats. These are generally used to
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# reduce the amount of duplication between instruction patterns.
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@rs_rt_rd ...... rs:5 rt:5 rd:5 ..... ...... &rtype sa=0
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@rt_rd ...... ..... rt:5 rd:5 ..... ...... &rtype rs=0 sa=0
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@rs ...... rs:5 ..... .......... ...... &rtype rt=0 rd=0 sa=0
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@rd ...... .......... rd:5 ..... ...... &rtype rs=0 rt=0 sa=0
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###########################################################################
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MFHI1 011100 0000000000 ..... 00000 010000 @rd
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MTHI1 011100 ..... 0000000000 00000 010001 @rs
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MFLO1 011100 0000000000 ..... 00000 010010 @rd
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MTLO1 011100 ..... 0000000000 00000 010011 @rs
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# MMI2
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PCPYLD 011100 ..... ..... ..... 01110 001001 @rs_rt_rd
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PAND 011100 ..... ..... ..... 10010 001001 @rs_rt_rd
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PXOR 011100 ..... ..... ..... 10011 001001 @rs_rt_rd
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# MMI3
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PCPYUD 011100 ..... ..... ..... 01110 101001 @rs_rt_rd
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POR 011100 ..... ..... ..... 10010 101001 @rs_rt_rd
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PNOR 011100 ..... ..... ..... 10011 101001 @rs_rt_rd
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PCPYH 011100 00000 ..... ..... 11011 101001 @rt_rd
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