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Matheus Ferst 2c9f795841 target/ppc: Implement Vector Insert from VSR using GPR index insns 
Implements the following PowerISA v3.1 instructions:
vinsbvlx: Vector Insert Byte from VSR using GPR-specified Left-Index
vinshvlx: Vector Insert Halfword from VSR using GPR-specified
          Left-Index
vinswvlx: Vector Insert Word from VSR using GPR-specified Left-Index
vinsbvrx: Vector Insert Byte from VSR using GPR-specified Right-Index
vinshvrx: Vector Insert Halfword from VSR using GPR-specified
          Right-Index
vinswvrx: Vector Insert Word from VSR using GPR-specified Right-Index

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20211104123719.323713-8-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-11-09 10:32:52 +11:00
..
alpha
target/alpha: Implement alpha_cpu_record_sigbus
2021-11-02 07:00:52 -04:00
arm
Add nuvoton sd module for NPCM7XX
2021-11-03 09:31:25 -04:00
avr
target/avr: Drop checks for singlestep_enabled
2021-10-15 16:39:14 -07:00
cris
target/cris: Make cris_cpu_tlb_fill sysemu only
2021-11-02 07:00:52 -04:00
hexagon
This series adds support for the Hexagon Vector eXtensions (HVX)
2021-11-04 06:34:36 -04:00
hppa
target/hppa: Make hppa_cpu_tlb_fill sysemu only
2021-11-02 07:00:52 -04:00
i386
target-i386: mmu: fix handling of noncanonical virtual addresses
2021-11-08 08:55:20 +01:00
m68k
target/m68k: Make m68k_cpu_tlb_fill sysemu only
2021-11-02 07:00:52 -04:00
microblaze
target/microblaze: Do not set MO_ALIGN for user-only
2021-11-02 07:00:52 -04:00
mips
MIPS patches queue
2021-11-02 15:12:11 -04:00
nios2
target/nios2: Implement nios2_cpu_record_sigsegv
2021-11-02 07:00:52 -04:00
openrisc
target/openrisc: Make openrisc_cpu_tlb_fill sysemu only
2021-11-02 07:00:52 -04:00
ppc
target/ppc: Implement Vector Insert from VSR using GPR index insns
2021-11-09 10:32:52 +11:00
riscv
target/riscv: Make riscv_cpu_tlb_fill sysemu only
2021-11-02 07:00:52 -04:00
rx
target/rx: Drop checks for singlestep_enabled
2021-10-15 16:39:14 -07:00
s390x
Trivial patches branch pull request 20211101 v2
2021-11-03 11:24:09 -04:00
sh4
target/sh4: Set fault address in superh_cpu_do_unaligned_access
2021-11-02 07:00:52 -04:00
sparc
target/sparc: Set fault address in sparc_cpu_do_unaligned_access
2021-11-02 07:00:52 -04:00
tricore
target/tricore: Drop check for singlestep_enabled
2021-10-15 16:39:14 -07:00
xtensa
Trivial patches branch pull request 20211101 v2
2021-11-03 11:24:09 -04:00
Kconfig
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meson.build
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