Peter Maydell 2c4da50d94 armv7m: add state for v7M CCR, CFSR, HFSR, DFSR, MMFAR, BFAR ... Add the structure fields, VMState fields, reset code and macros for the v7M system control registers CCR, CFSR, HFSR, DFSR, MMFAR and BFAR. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 1485285380-10565-4-git-send-email-peter.maydell@linaro.org		2017-01-27 15:29:08 +00:00
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arch_dump.c
arm_ldst.h
arm-powerctl.c
arm-powerctl.h
arm-semi.c
cpu64.c	target-arm: Enable EL2 feature bit on A53 and A57	2017-01-20 11:15:10 +00:00
cpu-qom.h
cpu.c	armv7m: add state for v7M CCR, CFSR, HFSR, DFSR, MMFAR, BFAR	2017-01-27 15:29:08 +00:00
cpu.h	armv7m: add state for v7M CCR, CFSR, HFSR, DFSR, MMFAR, BFAR	2017-01-27 15:29:08 +00:00
crypto_helper.c
gdbstub64.c
gdbstub.c
helper-a64.c	target-arm: Use clrsb helper	2017-01-10 08:47:48 -08:00
helper-a64.h	target-arm: Use clrsb helper	2017-01-10 08:47:48 -08:00
helper.c	target/arm: Drop IS_M() macro	2017-01-27 15:29:08 +00:00
helper.h	target-arm: Use clz opcode	2017-01-10 08:06:11 -08:00
internals.h	armv7m: Fix reads of CONTROL register bit 1	2017-01-27 15:20:21 +00:00
iwmmxt_helper.c
kvm32.c
kvm64.c
kvm_arm.h
kvm-consts.h
kvm-stub.c
kvm.c
machine.c	armv7m: add state for v7M CCR, CFSR, HFSR, DFSR, MMFAR, BFAR	2017-01-27 15:29:08 +00:00
Makefile.objs
monitor.c
neon_helper.c
op_addsub.h
op_helper.c	target-arm: Log AArch64 exception returns	2016-12-27 14:59:25 +00:00
psci.c	target/arm/psci.c: If EL2 implemented, start CPUs in EL2	2017-01-20 11:15:10 +00:00
trace-events
translate-a64.c	target/arm: Fix ubfx et al for aarch64	2017-01-13 09:48:20 -08:00
translate.c	armv7m: Replace armv7m.hack with unassigned_access handler	2017-01-27 15:20:21 +00:00
translate.h