qemu/hw/riscv/Kconfig
Alistair Francis a7d2d98c59 hw/char: Initial commit of Ibex UART
This is the initial commit of the Ibex UART device. Serial TX is
working, while RX has been implemeneted but untested.

This is based on the documentation from:
https://docs.opentitan.org/hw/ip/uart/doc/

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: LIU Zhiwei<zhiwei_liu@c-sky.com>
2020-06-19 08:24:07 -07:00

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config HTIF
bool
config HART
bool
config IBEX
bool
config SIFIVE
bool
select MSI_NONBROKEN
config SIFIVE_E
bool
select HART
select SIFIVE
select UNIMP
config SIFIVE_U
bool
select CADENCE
select HART
select SIFIVE
select UNIMP
config SPIKE
bool
select HART
select HTIF
select SIFIVE
config OPENTITAN
bool
select IBEX
select HART
select UNIMP
config RISCV_VIRT
bool
imply PCI_DEVICES
imply TEST_DEVICES
select PCI
select HART
select SERIAL
select GOLDFISH_RTC
select VIRTIO_MMIO
select PCI_EXPRESS_GENERIC_BRIDGE
select PFLASH_CFI01
select SIFIVE