3986c650a2
Now that FSR is no longer a tcg global temp, we can say that the fpu helpers do not write to tcg temps. All temps are read implicitly by the fpu exception path. Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
33 lines
1.4 KiB
C
33 lines
1.4 KiB
C
DEF_HELPER_FLAGS_2(raise_exception, TCG_CALL_NO_WG, noreturn, env, i32)
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DEF_HELPER_FLAGS_3(divs, TCG_CALL_NO_WG, i32, env, i32, i32)
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DEF_HELPER_FLAGS_3(divu, TCG_CALL_NO_WG, i32, env, i32, i32)
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DEF_HELPER_FLAGS_3(fadd, TCG_CALL_NO_WG, i32, env, i32, i32)
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DEF_HELPER_FLAGS_3(frsub, TCG_CALL_NO_WG, i32, env, i32, i32)
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DEF_HELPER_FLAGS_3(fmul, TCG_CALL_NO_WG, i32, env, i32, i32)
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DEF_HELPER_FLAGS_3(fdiv, TCG_CALL_NO_WG, i32, env, i32, i32)
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DEF_HELPER_FLAGS_2(flt, TCG_CALL_NO_WG, i32, env, i32)
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DEF_HELPER_FLAGS_2(fint, TCG_CALL_NO_WG, i32, env, i32)
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DEF_HELPER_FLAGS_2(fsqrt, TCG_CALL_NO_WG, i32, env, i32)
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DEF_HELPER_FLAGS_3(fcmp_un, TCG_CALL_NO_WG, i32, env, i32, i32)
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DEF_HELPER_FLAGS_3(fcmp_lt, TCG_CALL_NO_WG, i32, env, i32, i32)
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DEF_HELPER_FLAGS_3(fcmp_eq, TCG_CALL_NO_WG, i32, env, i32, i32)
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DEF_HELPER_FLAGS_3(fcmp_le, TCG_CALL_NO_WG, i32, env, i32, i32)
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DEF_HELPER_FLAGS_3(fcmp_gt, TCG_CALL_NO_WG, i32, env, i32, i32)
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DEF_HELPER_FLAGS_3(fcmp_ne, TCG_CALL_NO_WG, i32, env, i32, i32)
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DEF_HELPER_FLAGS_3(fcmp_ge, TCG_CALL_NO_WG, i32, env, i32, i32)
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DEF_HELPER_FLAGS_2(pcmpbf, TCG_CALL_NO_RWG_SE, i32, i32, i32)
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#if !defined(CONFIG_USER_ONLY)
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DEF_HELPER_3(mmu_read, i32, env, i32, i32)
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DEF_HELPER_4(mmu_write, void, env, i32, i32, i32)
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#endif
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DEF_HELPER_5(memalign, void, env, tl, i32, i32, i32)
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DEF_HELPER_2(stackprot, void, env, tl)
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DEF_HELPER_2(get, i32, i32, i32)
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DEF_HELPER_3(put, void, i32, i32, i32)
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