Christoffer Dall a9d477c4e3 arm_gic: Add GICC_APRn state to the GICState ... The GICC_APRn registers are not currently supported by the ARM GIC v2.0 emulation. This patch adds the missing state. Note that we also change the number of APRs to use a define GIC_NR_APRS based on the maximum number of preemption levels. This patch also adds RAZ/WI accessors for the four registers on the emulated CPU interface. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>		2014-02-08 14:50:48 +00:00
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allwinner-a10-pic.h	hw/intc: add allwinner A10 interrupt controller	2013-12-17 20:12:51 +00:00
arm_gic_common.h	arm_gic: Add GICC_APRn state to the GICState	2014-02-08 14:50:48 +00:00
arm_gic.h
realview_gic.h	realview_gic: Prepare for QOM embedding	2013-11-05 17:47:30 +01:00