Peter Maydell 52a9f60935 target/arm: Correct calculation of tlb range invalidate length ... The calculation of the length of TLB range invalidate operations in tlbi_aa64_range_get_length() is incorrect in two ways: * the NUM field is 5 bits, but we read only 4 bits * we miscalculate the page_shift value, because of an off-by-one error: TG 0b00 is invalid TG 0b01 is 4K granule size == 4096 == 2^12 TG 0b10 is 16K granule size == 16384 == 2^14 TG 0b11 is 64K granule size == 65536 == 2^16 so page_shift should be (TG - 1) * 2 + 12 Thanks to the bug report submitter Cha HyunSoo for identifying both these errors. Fixes: 84940ed825 ("target/arm: Add support for FEAT_TLBIRANGE") Resolves: https://gitlab.com/qemu-project/qemu/-/issues/734 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20211130173257.1274194-1-peter.maydell@linaro.org		2021-12-15 10:35:26 +00:00
..
hvf	hvf: arm: Ignore cache operations on MMIO	2021-11-02 14:18:33 -04:00
a32-uncond.decode
a32.decode
arch_dump.c
arm_ldst.h	accel/tcg: Add DisasContextBase argument to translator_ld*	2021-09-14 12:00:20 -07:00
arm-powerctl.c
arm-powerctl.h
cpu64.c	target-arm: Add support for Fujitsu A64FX	2021-09-01 11:08:18 +01:00
cpu_tcg.c	target/arm: Implement arm_cpu_record_sigbus	2021-11-02 07:00:52 -04:00
cpu-param.h
cpu-qom.h
cpu.c	target/arm: Implement arm_cpu_record_sigbus	2021-11-02 07:00:52 -04:00
cpu.h	include/exec: Move cpu_signal_handler declaration	2021-09-21 19:36:44 -07:00
crypto_helper.c
debug_helper.c	target/arm: Suppress bp for exceptions with more priority	2021-12-15 10:35:26 +00:00
gdbstub64.c	target/arm: Move gdbstub related code out of helper.c	2021-09-30 13:42:10 +01:00
gdbstub.c	target/arm: Assert thumb pc is aligned	2021-12-15 10:35:26 +00:00
helper-a64.c	target/arm: Use cpu_*_mmu instead of helper_*_mmu	2021-10-13 08:46:11 -07:00
helper-a64.h
helper-mve.h
helper-sve.h
helper.c	target/arm: Correct calculation of tlb range invalidate length	2021-12-15 10:35:26 +00:00
helper.h	target/arm: Take an exception if PC is misaligned	2021-12-15 10:35:26 +00:00
hvf_arm.h	hvf: arm: Implement -cpu host	2021-09-21 16:28:26 +01:00
idau.h
internals.h	target/arm: Implement arm_cpu_record_sigbus	2021-11-02 07:00:52 -04:00
iwmmxt_helper.c
Kconfig
kvm64.c
kvm_arm.h	hvf: arm: Implement -cpu host	2021-09-21 16:28:26 +01:00
kvm-consts.h
kvm-stub.c
kvm.c	memory: Name all the memory listeners	2021-09-30 15:30:24 +02:00
m_helper.c	target/arm: Use cpu_*_mmu instead of helper_*_mmu	2021-10-13 08:46:11 -07:00
m-nocp.decode
machine.c	target/arm: Assert thumb pc is aligned	2021-12-15 10:35:26 +00:00
meson.build	arm: Add Hypervisor.framework build target	2021-09-21 16:28:26 +01:00
monitor.c
mte_helper.c	target/arm: Use cpu_loop_exit_sigsegv for mte tag lookup	2021-11-02 07:00:52 -04:00
mve_helper.c
mve.decode
neon_helper.c
neon-dp.decode
neon-ls.decode
neon-shared.decode
op_addsub.h
op_helper.c
pauth_helper.c
psci.c	Revert "arm: tcg: Adhere to SMCCC 1.3 section 5.2"	2021-11-22 13:41:48 +00:00
sve_helper.c	target/arm: Fixup comment re handle_cpu_signal	2021-11-02 07:00:52 -04:00
sve.decode
syndrome.h	target/arm: Take an exception if PC is misaligned	2021-12-15 10:35:26 +00:00
t16.decode
t32.decode
tlb_helper.c	target/arm: Take an exception if PC is misaligned	2021-12-15 10:35:26 +00:00
trace-events
trace.h
translate-a32.h	target/arm: Introduce store_cpu_field_constant() helper	2021-11-02 14:14:55 -04:00
translate-a64.c	target/arm: Take an exception if PC is misaligned	2021-12-15 10:35:26 +00:00
translate-a64.h
translate-m-nocp.c	target/arm: Add TB flag for "MVE insns not predicated"	2021-09-21 16:28:27 +01:00
translate-mve.c	target/arm: Optimize MVE 1op-immediate insns	2021-09-21 16:28:27 +01:00
translate-neon.c
translate-sve.c	target/arm: Use tcg_constant_i64() in do_sat_addsub_64()	2021-11-02 14:14:55 -04:00
translate-vfp.c	target/arm: Add TB flag for "MVE insns not predicated"	2021-09-21 16:28:27 +01:00
translate.c	target/arm: Assert thumb pc is aligned	2021-12-15 10:35:26 +00:00
translate.h	target/arm: Add TB flag for "MVE insns not predicated"	2021-09-21 16:28:27 +01:00
vec_helper.c
vec_internal.h
vfp_helper.c
vfp-uncond.decode
vfp.decode