qemu/tests/tcg/mips/mips32-dsp
Petar Jovanovic beb3faaa00 target-mips: correct the values in the DSP tests
Five tests files for DSP instructions had wrong expected values in the tests.
This change fixes this, and this has been cross-checked by running the same
test binaries on Malta 74K board.

Signed-off-by: Petar Jovanovic <petar.jovanovic@imgtec.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-07-30 17:48:24 +02:00
..
absq_s_ph.c
absq_s_w.c
addq_ph.c
addq_s_ph.c
addq_s_w.c
addsc.c
addu_qb.c
addu_s_qb.c
addwc.c
bitrev.c
bposge32.c
cmp_eq_ph.c
cmp_le_ph.c
cmp_lt_ph.c
cmpgu_eq_qb.c
cmpgu_le_qb.c
cmpgu_lt_qb.c
cmpu_eq_qb.c
cmpu_le_qb.c
cmpu_lt_qb.c
dpaq_s_w_ph.c
dpaq_sa_l_w.c target-mips: fix mipsdsp_mul_q31_q31 2013-07-29 07:48:17 +02:00
dpau_h_qbl.c
dpau_h_qbr.c
dpsq_s_w_ph.c target-mips: correct the values in the DSP tests 2013-07-30 17:48:24 +02:00
dpsq_sa_l_w.c target-mips: fix mipsdsp_mul_q31_q31 2013-07-29 07:48:17 +02:00
dpsu_h_qbl.c
dpsu_h_qbr.c
extp.c target-mips: fix incorrect behaviour for EXTP 2013-05-17 19:29:40 +02:00
extpdp.c target-mips: fix EXTPDP and setting up pos field in the DSPControl reg 2013-05-19 15:10:51 +02:00
extpdpv.c
extpv.c
extr_r_w.c target-mips: fix rndrashift_short_acc and code for EXTR_ instructions 2013-03-17 01:06:34 +01:00
extr_rs_w.c target-mips: fix rndrashift_short_acc and code for EXTR_ instructions 2013-03-17 01:06:34 +01:00
extr_s_h.c target-mips: Fix for helpers for EXTR_* instructions 2013-01-01 11:11:38 +01:00
extr_w.c target-mips: fix rndrashift_short_acc and code for EXTR_ instructions 2013-03-17 01:06:34 +01:00
extrv_r_w.c target-mips: Fix for helpers for EXTR_* instructions 2013-01-01 11:11:38 +01:00
extrv_rs_w.c target-mips: Fix for helpers for EXTR_* instructions 2013-01-01 11:11:38 +01:00
extrv_s_h.c target-mips: Fix for helpers for EXTR_* instructions 2013-01-01 11:11:38 +01:00
extrv_w.c target-mips: Fix for helpers for EXTR_* instructions 2013-01-01 11:11:38 +01:00
insv.c target-mips: fix incorrect behaviour for INSV 2013-05-08 18:46:38 +02:00
lbux.c
lhx.c
lwx.c
madd.c
maddu.c
main.c
Makefile
maq_s_w_phl.c target-mips: correct the values in the DSP tests 2013-07-30 17:48:24 +02:00
maq_s_w_phr.c target-mips: correct the values in the DSP tests 2013-07-30 17:48:24 +02:00
maq_sa_w_phl.c target-mips: fix mipsdsp_mul_q15_q15 and tests for MAQ_SA_W_PHL/PHR 2013-04-15 16:07:57 +02:00
maq_sa_w_phr.c target-mips: fix mipsdsp_mul_q15_q15 and tests for MAQ_SA_W_PHL/PHR 2013-04-15 16:07:57 +02:00
mfhi.c
mflo.c
modsub.c
msub.c
msubu.c
mthi.c
mthlip.c target-mips: fix incorrect test for MTHLIP 2013-01-31 23:42:04 +01:00
mtlo.c
muleq_s_w_phl.c
muleq_s_w_phr.c
muleu_s_ph_qbl.c
muleu_s_ph_qbr.c
mulq_rs_ph.c target-mips: fix multiplication in mipsdsp_rndq15_mul_q15_q15 2013-07-28 18:26:36 +02:00
mult.c
multu.c
packrl_ph.c
pick_ph.c
pick_qb.c
preceq_w_phl.c
preceq_w_phr.c
precequ_ph_qbl.c
precequ_ph_qbla.c
precequ_ph_qbr.c
precequ_ph_qbra.c
preceu_ph_qbl.c
preceu_ph_qbla.c
preceu_ph_qbr.c
preceu_ph_qbra.c
precrq_ph_w.c
precrq_qb_ph.c
precrq_rs_ph_w.c target-mips: fix mipsdsp_trunc16_sat16_round 2013-07-29 00:27:36 +02:00
precrqu_s_qb_ph.c
raddu_w_qb.c
rddsp.c target-mips: Fix incorrect reads and writes to DSPControl register 2013-01-01 11:10:47 +01:00
repl_ph.c
repl_qb.c
replv_ph.c
replv_qb.c
shilo.c target-mips: Fix incorrect shift for SHILO and SHILOV 2012-12-06 08:12:14 +01:00
shilov.c target-mips: Fix incorrect shift for SHILO and SHILOV 2012-12-06 08:12:14 +01:00
shll_ph.c target-mips: fix calculation of overflow for SHLL.PH and SHLL.QB 2013-05-03 11:50:49 +02:00
shll_qb.c target-mips: fix calculation of overflow for SHLL.PH and SHLL.QB 2013-05-03 11:50:49 +02:00
shll_s_ph.c
shll_s_w.c
shllv_ph.c
shllv_qb.c
shllv_s_ph.c
shllv_s_w.c
shra_ph.c
shra_r_ph.c
shra_r_w.c
shrav_ph.c
shrav_r_ph.c
shrav_r_w.c
shrl_qb.c
shrlv_qb.c
subq_ph.c
subq_s_ph.c target-mips: fix DSP overflow macro and affected routines 2013-03-04 18:15:34 +01:00
subq_s_w.c target-mips: fix DSP overflow macro and affected routines 2013-03-04 18:15:34 +01:00
subu_qb.c
subu_s_qb.c
wrdsp.c target-mips: Fix incorrect reads and writes to DSPControl register 2013-01-01 11:10:47 +01:00