Marcel Apfelbaum 0fbf50b6ec Revert "hw/pci: partially handle pci master abort" ... This reverts commit a53ae8e934. The patch being reverted introduced a low-priority memory region covering all 64 bit pci address space. This exposed the following bugs elsewhere in the code: 1. Some memory regions have INT64_MAX size, where the intent was all 64 bit address space. This results in a sub-page region, should be UINT64_MAX. 2. page table rendering in exec.c ignores physical address bits above TARGET_PHYS_ADDR_SPACE_BITS. Access outside this range (e.g. from device DMA, or gdb stub) ends up with a wrong region. Registering a region outside this range leads to page table corruption. 3. Some regions overlap PCI hole and have same priority. This only works as long as no device uses the overlapping address. It doesn't look like we can resolve all issues in time for 1.7. Let's fix the bugs first and apply afterwards for 1.8. Signed-off-by: Marcel Apfelbaum <marcel.a@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>		2013-11-10 14:30:00 +02:00
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msi.h
msix.h	pci: add VMSTATE_MSIX	2013-06-03 11:37:44 +02:00
pci_bridge.h	pci-bridge: update mappings for migration/restore	2013-07-10 12:49:26 +03:00
pci_bus.h	Revert "hw/pci: partially handle pci master abort"	2013-11-10 14:30:00 +02:00
pci_host.h	pci: Fold host_buses list into PCIHostState functionality	2013-07-07 23:10:57 +03:00
pci_ids.h	lsi: add 53C810 variant	2013-09-16 12:42:40 +02:00
pci_regs.h
pci.h	bswap.h: Remove le32_to_cpupu()	2013-11-05 19:57:46 -08:00
pcie_aer.h
pcie_host.h	q35: expose mmcfg size as a property	2013-10-14 17:48:51 +03:00
pcie_port.h	pcie_port: Turn PCIEPort and PCIESlot into abstract QOM types	2013-07-29 20:45:24 +02:00
pcie_regs.h
pcie.h	hw/pcie: AER and hot-plug events must use device's interrupt	2013-10-14 17:11:45 +03:00
shpc.h
slotid_cap.h