qemu/tcg/loongarch64
Richard Henderson 2b2ae0a42e tcg/loongarch64: Use C_N2_I1 for INDEX_op_qemu_ld_a*_i128
Use new registers for the output, so that we never overlap
the input address, which could happen for user-only.
This avoids a "tmp = addr + 0" in that case.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Jiajie Chen <c@jia.je>
Message-Id: <20230916220151.526140-3-richard.henderson@linaro.org>
2023-11-06 08:27:21 -08:00
..
tcg-insn-defs.c.inc tcg/loongarch64: Import LSX instructions 2023-09-15 05:26:50 -07:00
tcg-target-con-set.h tcg/loongarch64: Use C_N2_I1 for INDEX_op_qemu_ld_a*_i128 2023-11-06 08:27:21 -08:00
tcg-target-con-str.h tcg/loongarch64: Lower add/sub_vec to vadd/vsub 2023-09-15 05:26:51 -07:00
tcg-target-reg-bits.h tcg: Split out tcg-target-reg-bits.h 2023-06-05 12:04:28 -07:00
tcg-target.c.inc tcg/loongarch64: Use C_N2_I1 for INDEX_op_qemu_ld_a*_i128 2023-11-06 08:27:21 -08:00
tcg-target.h tcg/loongarch64: Implement 128-bit load & store 2023-09-16 14:57:10 +00:00
tcg-target.opc.h tcg/loongarch64: Lower basic tcg vec ops to LSX 2023-09-15 05:26:50 -07:00