Leon Alrae 28b027d5b6 target-mips: remove misleading comments in translate_init.c ...

PABITS are not hardcoded to 36 bits and we do not model 59 PABITS (which is
the architectural limit) in QEMU.

Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>

2015-06-12 09:05:43 +01:00

..

cpu-qom.h

target-mips: replace cpu_save/cpu_load with VMStateDescription

2015-03-11 14:13:57 +00:00

cpu.c

target-mips: replace cpu_save/cpu_load with VMStateDescription

2015-03-11 14:13:57 +00:00

cpu.h

target-mips: add MTHC0 and MFHC0 instructions

2015-06-12 09:05:31 +01:00

dsp_helper.c

target-mips: Fix warning from Sparse

2015-03-19 11:11:55 +03:00

gdbstub.c

…

helper.c

…

helper.h

target-mips: add ERETNC instruction and Config5.LLB bit

2015-06-11 10:13:29 +01:00

kvm_mips.h

…

kvm.c

kvm: introduce kvm_arch_msi_data_to_gsi

2015-06-02 14:56:25 +01:00

lmi_helper.c

…

machine.c

target-mips: add CP0.PageGrain.ELPA support

2015-06-12 09:05:20 +01:00

Makefile.objs

…

mips-defs.h

target-mips: add CP0.PageGrain.ELPA support

2015-06-12 09:05:20 +01:00

msa_helper.c

target-mips: add missing MSACSR and restore fp_status and hflags

2015-03-11 14:13:57 +00:00

op_helper.c

target-mips: add CP0.PageGrain.ELPA support

2015-06-12 09:05:20 +01:00

TODO

…

translate_init.c

target-mips: remove misleading comments in translate_init.c

2015-06-12 09:05:43 +01:00

translate.c

target-mips: add MTHC0 and MFHC0 instructions

2015-06-12 09:05:31 +01:00