qemu/tcg/aarch64
Richard Henderson 285a691fd2 tcg/aarch64: Simplify constraints on qemu_ld/st
Adjust the softmmu tlb to use TMP[0-2], not any of the normally available
registers.  Since we handle overlap betwen inputs and helper arguments,
we can allow any allocatable reg.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-30 09:51:11 -07:00
..
tcg-target-con-set.h tcg/aarch64: Simplify constraints on qemu_ld/st 2023-05-30 09:51:11 -07:00
tcg-target-con-str.h tcg/aarch64: Simplify constraints on qemu_ld/st 2023-05-30 09:51:11 -07:00
tcg-target.c.inc tcg/aarch64: Simplify constraints on qemu_ld/st 2023-05-30 09:51:11 -07:00
tcg-target.h util: Add cpuinfo-aarch64.c 2023-05-23 16:51:18 -07:00
tcg-target.opc.h tcg/aarch64: Implement INDEX_op_rotl{i,v}_vec 2020-06-02 08:42:37 -07:00