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qemu/target/mips
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Peter Maydell f14ad81eed MIPS patches queue 
- Fix CP0 cycle counter timing
 - Fix VMState of gt64120 IRQs
 - Long due PIIX4 QOM cleanups
 - ISA IRQ QOM'ification / cleanups
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Merge remote-tracking branch 'remotes/philmd/tags/mips-20220308' into staging

MIPS patches queue

- Fix CP0 cycle counter timing
- Fix VMState of gt64120 IRQs
- Long due PIIX4 QOM cleanups
- ISA IRQ QOM'ification / cleanups

# gpg: Signature made Tue 08 Mar 2022 18:39:42 GMT
# gpg:                using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: FAAB E75E 1291 7221 DCFD  6BB2 E3E3 2C2C DEAD C0DE

* remotes/philmd/tags/mips-20220308:
  tests/avocado/linux_ssh_mips_malta.py: add missing accel (tcg) tag
  hw/isa: Inline and remove one-line isa_init_irq()
  hw/isa: Drop unused attributes from ISADevice
  hw/isa/isa-bus: Remove isabus_dev_print()
  hw/input/pckbd: QOM'ify IRQ numbers
  hw/rtc/m48t59-isa: QOM'ify IRQ number
  hw/rtc/mc146818rtc: QOM'ify IRQ number
  hw/mips/gt64xxx_pci: Resolve gt64120_register()
  hw/isa/piix4: Replace some magic IRQ constants
  hw/isa/piix4: Resolve global instance variable
  hw/isa/piix4: Pass PIIX4State as opaque parameter for piix4_set_irq()
  hw/isa/piix4: Resolve redundant i8259[] attribute
  malta: Move PCI interrupt handling from gt64xxx_pci to piix4
  hw/mips/gt64xxx_pci: Fix PCI IRQ levels to be preserved during migration
  target/mips: Remove duplicated MIPSCPU::cp0_count_rate
  target/mips: Fix cycle counter timing calculations

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-03-09 09:13:39 +00:00
..
sysemu target/mips: Move CP0 helpers to sysemu/cp0.c 2021-05-02 16:49:35 +02:00
tcg exec/exec-all: Move 'qemu/log.h' include in units requiring it 2022-02-21 10:18:06 +01:00
cpu-defs.c.inc target/mips: Remove obsolete FCR0_HAS2008 comment on P5600 CPU 2021-11-02 14:32:32 +01:00
cpu-param.h target/mips: Support variable page size 2020-06-01 13:28:21 +02:00
cpu-qom.h target: Introduce and use OBJECT_DECLARE_CPU_TYPE() macro 2022-03-06 22:23:09 +01:00
cpu.c target/mips: Remove duplicated MIPSCPU::cp0_count_rate 2022-03-07 20:34:17 +01:00
cpu.h MIPS patches queue 2022-03-09 09:13:39 +00:00
fpu_helper.h target/mips: Set set_default_nan_mode with set_snan_bit_is_one 2021-05-16 07:13:51 -05:00
fpu.c target/mips: Optimize CPU/FPU regnames[] arrays 2021-05-02 16:49:34 +02:00
gdbstub.c target/mips: Extract FPU helpers to 'fpu_helper.h' 2021-01-14 17:13:53 +01:00
helper.h target/mips: Extract NEC Vr54xx helper definitions 2021-08-25 13:02:14 +02:00
internal.h MIPS patches queue 2022-03-09 09:13:39 +00:00
Kconfig meson: Introduce target-specific Kconfig 2021-07-09 18:21:34 +02:00
kvm_mips.h hw/mips: Implement the kvm_type() hook in MachineClass 2020-06-27 19:35:39 +02:00
kvm.c sysemu: Let VMChangeStateHandler take boolean 'running' argument 2021-03-09 23:13:57 +01:00
meson.build target/mips: Move TCG source files under tcg/ sub directory 2021-05-02 16:49:35 +02:00
mips-defs.h target/mips: Remove vendor specific CPU definitions 2021-01-14 17:13:54 +01:00
msa.c target/mips: Move msa_reset() to new source file 2021-05-02 16:49:34 +02:00
TODO Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00