Peter Maydell 270076d01a target/arm: Pull calls to disas_sve() and disas_sme() out of legacy decoder ... The SVE and SME decode is already done by decodetree. Pull the calls to these decoders out of the legacy decoder. This doesn't change behaviour because all the patterns in sve.decode and sme.decode already require the bits that the legacy decoder is decoding to have the correct values. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20230512144106.3608981-4-peter.maydell@linaro.org		2023-05-18 11:16:45 +01:00
..
a32-uncond.decode
a32.decode
a64.decode	target/arm: Create decodetree skeleton for A64	2023-05-18 11:16:45 +01:00
arm_ldst.h	target/arm: Move translate-a32.h, arm_ldst.h, sve_ldst_internal.h to tcg/	2023-05-12 15:43:36 +01:00
cpu32.c	target/arm: move cpu_tcg to tcg/cpu32.c	2023-05-02 10:54:31 +01:00
cpu64.c	target/arm: move cpu_tcg to tcg/cpu32.c	2023-05-02 10:54:31 +01:00
crypto_helper.c
helper-a64.c	gdbstub: move register helpers into standalone include	2023-03-07 20:44:08 +00:00
helper-a64.h	target/arm: Move helper-{a64,mve,sme,sve}.h to tcg/	2023-05-12 15:43:37 +01:00
helper-mve.h	target/arm: Move helper-{a64,mve,sme,sve}.h to tcg/	2023-05-12 15:43:37 +01:00
helper-sme.h	target/arm: Move helper-{a64,mve,sme,sve}.h to tcg/	2023-05-12 15:43:37 +01:00
helper-sve.h	target/arm: Move helper-{a64,mve,sme,sve}.h to tcg/	2023-05-12 15:43:37 +01:00
hflags.c	target/arm: Move hflags code into the tcg directory	2023-02-27 13:27:04 +00:00
iwmmxt_helper.c
m_helper.c	gdbstub: move register helpers into standalone include	2023-03-07 20:44:08 +00:00
m-nocp.decode
meson.build	target/arm: Create decodetree skeleton for A64	2023-05-18 11:16:45 +01:00
mte_helper.c	softmmu: Restrict cpu_check_watchpoint / address_matches to TCG accel	2023-03-28 15:24:06 -07:00
mve_helper.c
mve.decode
neon_helper.c
neon-dp.decode
neon-ls.decode
neon-shared.decode
op_helper.c
pauth_helper.c	target/arm: Correct AArch64.S2MinTxSZ 32-bit EL1 input size check	2023-05-12 16:01:25 +01:00
psci.c	target/arm: Move psci.c into the tcg directory	2023-02-27 13:27:04 +00:00
sme_helper.c
sme-fa64.decode
sme.decode
sve_helper.c	target/arm: Fix vd == vm overlap in sve_ldff1_z	2023-05-18 10:31:43 +01:00
sve_ldst_internal.h	target/arm: Move translate-a32.h, arm_ldst.h, sve_ldst_internal.h to tcg/	2023-05-12 15:43:36 +01:00
sve.decode
t16.decode
t32.decode
tlb_helper.c	target/arm: Don't set ISV when reporting stage 1 faults in ESR_EL2	2023-04-20 10:21:16 +01:00
translate-a32.h	target/arm: Move translate-a32.h, arm_ldst.h, sve_ldst_internal.h to tcg/	2023-05-12 15:43:36 +01:00
translate-a64.c	target/arm: Pull calls to disas_sve() and disas_sme() out of legacy decoder	2023-05-18 11:16:45 +01:00
translate-a64.h	target/arm: Drop new_tmp_a64_zero	2023-03-05 13:44:07 -08:00
translate-m-nocp.c	target/arm: Drop tcg_temp_free from translator-m-nocp.c	2023-03-05 13:44:07 -08:00
translate-mve.c	target/arm: Avoid tcg_const_* in translate-mve.c	2023-03-13 07:03:39 -07:00
translate-neon.c	target/arm: Drop tcg_temp_free from translator-neon.c	2023-03-05 13:44:07 -08:00
translate-sme.c	target/arm: Drop tcg_temp_free from translator-sme.c	2023-03-05 13:44:07 -08:00
translate-sve.c	target/arm: Avoid tcg_const_ptr in gen_sve_{ldr,str}	2023-03-13 07:03:39 -07:00
translate-vfp.c	target/arm: Create gen_set_rmode, gen_restore_rmode	2023-03-13 06:44:38 -07:00
translate.c	target/arm: Define and use new load_cpu_field_low32()	2023-05-02 15:47:41 +01:00
translate.h	target/arm: Create gen_set_rmode, gen_restore_rmode	2023-03-13 06:44:38 -07:00
vec_helper.c
vec_internal.h
vfp-uncond.decode
vfp.decode