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25ee608d79
qemu/target/ppc
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Lucas Mateus Castro (alqotel) 25ee608d79 target/ppc: ppc_store_fpscr doesn't update bits 0 to 28 and 52 
This commit fixes the difference reported in the bug in the reserved
bit 52, it does this by adding this bit to the mask of bits to not be
directly altered in the ppc_store_fpscr function (the hardware used to
compare to QEMU was a Power9).

The bits 0 to 27 were also added to the mask, as they are marked as
reserved in the PowerISA and bit 28 is a reserved extension of the DRN
field (bits 29:31) but can't be set using mtfsfi, while the other DRN
bits may be set using mtfsfi instruction, so bit 28 was also added to
the mask.

Although this is a difference reported in the bug, since it's a reserved
bit it may be a "don't care" case, as put in the bug report. Looking at
the ISA it doesn't explicitly mention this bit can't be set, like it
does for FEX and VX, so I'm unsure if this is necessary.

Resolves: https://gitlab.com/qemu-project/qemu/-/issues/266
Signed-off-by: Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br>
Message-Id: <20211201163808.440385-4-lucas.araujo@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
2021-12-17 17:57:13 +01:00
..
translate target/ppc: Fixed call to deferred exception 2021-12-17 17:57:12 +01:00
arch_dump.c target/ppc: Introduce ppc_interrupts_little_endian() 2021-07-09 10:38:18 +10:00
compat.c powerpc tcg: Fix Lesser GPL version number 2020-11-15 16:38:50 +01:00
cpu_init.c Trivial patches branch pull request 20211101 v2 2021-11-03 11:24:09 -04:00
cpu-models.c ppc: Add a POWER10 DD2 CPU 2021-08-27 12:41:13 +10:00
cpu-models.h ppc: Add a POWER10 DD2 CPU 2021-08-27 12:41:13 +10:00
cpu-param.h tcg: Split out target/arch/cpu-param.h 2019-06-10 07:03:34 -07:00
cpu-qom.h target/ppc: Remove PowerPCCPUClass.handle_mmu_fault 2021-07-09 10:38:18 +10:00
cpu.c target/ppc: ppc_store_fpscr doesn't update bits 0 to 28 and 52 2021-12-17 17:57:13 +01:00
cpu.h target/ppc: ppc_store_fpscr doesn't update bits 0 to 28 and 52 2021-12-17 17:57:13 +01:00
dfp_helper.c target/ppc: Move ddedpd[q],denbcd[q],dscli[q],dscri[q] to decodetree 2021-11-09 10:32:52 +11:00
excp_helper.c target/ppc: Restrict ppc_cpu_do_unaligned_access to sysemu 2021-11-02 07:00:52 -04:00
fpu_helper.c target/ppc: Fixed call to deferred exception 2021-12-17 17:57:12 +01:00
gdbstub.c target/ppc: Fix XER access in gdbstub 2021-10-21 11:42:47 +11:00
helper_regs.c target/ppc: add MMCR0 PMCC bits to hflags 2021-10-21 11:42:47 +11:00
helper_regs.h target/ppc: Remove env->immu_idx and env->dmmu_idx 2021-05-04 11:41:25 +10:00
helper.h target/ppc: Fixed call to deferred exception 2021-12-17 17:57:12 +01:00
insn32.decode target/ppc: Implement lxvkq instruction 2021-11-09 10:32:53 +11:00
insn64.decode target/ppc: Implement xxblendvb/xxblendvh/xxblendvw/xxblendvd instructions 2021-11-09 10:32:53 +11:00
int_helper.c target/ppc: Implement xxblendvb/xxblendvh/xxblendvw/xxblendvd instructions 2021-11-09 10:32:53 +11:00
internal.h target/ppc: Restrict ppc_cpu_do_unaligned_access to sysemu 2021-11-02 07:00:52 -04:00
Kconfig meson: Introduce target-specific Kconfig 2021-07-09 18:21:34 +02:00
kvm_ppc.h target/ppc: Support for H_RPT_INVALIDATE hcall 2021-07-09 11:01:06 +10:00
kvm-stub.c Include qemu-common.h exactly where needed 2019-06-12 13:20:20 +02:00
kvm.c target/ppc: Support for H_RPT_INVALIDATE hcall 2021-07-09 11:01:06 +10:00
machine.c target/ppc: updated vscr manipulation in machine.c 2021-05-19 10:30:28 +10:00
mem_helper.c accel/tcg: Move cpu_atomic decls to exec/cpu_ldst.h 2021-10-13 08:14:54 -07:00
meson.build target/ppc: divided mmu_helper.c in 2 files 2021-08-27 12:41:13 +10:00
mfrom_table_gen.c target/ppc: Style fixes for mfrom_table.inc.c & mfrom_table_gen.c 2019-04-26 10:42:38 +10:00
mfrom_table.c.inc meson: rename included C source files to .c.inc 2020-08-21 06:18:30 -04:00
misc_helper.c target/ppc: fold ppc_store_ptcr into it's only caller 2021-06-03 13:22:06 +10:00
mmu_common.c target/ppc: moved store_40x_sler to helper_regs.c 2021-08-27 12:41:13 +10:00
mmu_helper.c ppc/mmu_helper.c: do not truncate 'ea' in booke206_invalidate_ea_tlb() 2021-11-11 11:35:13 +01:00
mmu-book3s-v3.c target/ppc: Introduce ppc_xlate 2021-07-09 10:38:19 +10:00
mmu-book3s-v3.h target/ppc: introduce mmu-books.h 2021-07-09 10:38:19 +10:00
mmu-books.h target/ppc: introduce mmu-books.h 2021-07-09 10:38:19 +10:00
mmu-hash32.c target/ppc: change ppc_hash32_xlate to use mmu_idx 2021-07-09 10:38:19 +10:00
mmu-hash32.h target/ppc: change ppc_hash32_xlate to use mmu_idx 2021-07-09 10:38:19 +10:00
mmu-hash64.c target/ppc: fix Hash64 MMU update of PTE bit R 2021-11-29 21:00:08 +01:00
mmu-hash64.h target/ppc: fix Hash64 MMU update of PTE bit R 2021-11-29 21:00:08 +01:00
mmu-radix64.c target/ppc: fix address translation bug for radix mmus 2021-07-09 10:38:19 +10:00
mmu-radix64.h target/ppc: fix address translation bug for radix mmus 2021-07-09 10:38:19 +10:00
monitor.c target/ppc: Fix XER access in monitor 2021-10-21 11:42:47 +11:00
power8-pmu-regs.c.inc target/ppc: adding user read/write functions for PMCs 2021-10-21 11:42:47 +11:00
spr_tcg.h target/ppc: adding user read/write functions for PMCs 2021-10-21 11:42:47 +11:00
tcg-stub.c target/ppc: created tcg-stub.c file 2021-06-03 13:22:06 +10:00
timebase_helper.c powerpc tcg: Fix Lesser GPL version number 2020-11-15 16:38:50 +01:00
trace-events target/ppc: Convert debug to trace events (exceptions) 2021-09-30 12:26:06 +10:00
trace.h trace: switch position of headers to what Meson requires 2020-08-21 06:18:24 -04:00
translate.c target/ppc: moved stxv and lxv from legacy to decodtree 2021-11-09 10:32:53 +11:00
user_only_helper.c target/ppc: Implement ppc_cpu_record_sigsegv 2021-11-02 07:00:52 -04:00