6484a3e55b
The devel section is getting quite messy with the breakdown of the example plugins which should be usable by users. As we mention plugins in the emulation section along with semihosting move the overview there leaving the development section about the details of writing plugins. While we are at make the headings nicer and convert the option lists into nicely formatted tables. Acked-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240729144414.830369-11-alex.bennee@linaro.org>
746 lines
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746 lines
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ReStructuredText
Emulation
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=========
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QEMU's Tiny Code Generator (TCG) provides the ability to emulate a
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number of CPU architectures on any supported host platform. Both
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:ref:`System Emulation` and :ref:`User Mode Emulation` are supported
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depending on the guest architecture.
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.. list-table:: Supported Guest Architectures for Emulation
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:widths: 30 10 10 50
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:header-rows: 1
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* - Architecture (qemu name)
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- System
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- User
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- Notes
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* - Alpha
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- Yes
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- Yes
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- Legacy 64 bit RISC ISA developed by DEC
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* - Arm (arm, aarch64)
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- :ref:`Yes<ARM-System-emulator>`
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- Yes
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- Wide range of features, see :ref:`Arm Emulation` for details
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* - AVR
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- :ref:`Yes<AVR-System-emulator>`
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- No
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- 8 bit micro controller, often used in maker projects
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* - Cris
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- Yes
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- Yes
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- Embedded RISC chip developed by AXIS
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* - Hexagon
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- No
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- Yes
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- Family of DSPs by Qualcomm
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* - PA-RISC (hppa)
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- Yes
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- Yes
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- A legacy RISC system used in HP's old minicomputers
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* - x86 (i386, x86_64)
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- :ref:`Yes<QEMU-PC-System-emulator>`
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- Yes
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- The ubiquitous desktop PC CPU architecture, 32 and 64 bit.
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* - LoongArch
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- Yes
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- Yes
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- A MIPS-like 64bit RISC architecture developed in China
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* - m68k
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- :ref:`Yes<ColdFire-System-emulator>`
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- Yes
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- Motorola 68000 variants and ColdFire
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* - Microblaze
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- Yes
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- Yes
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- RISC based soft-core by Xilinx
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* - MIPS (mips*)
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- :ref:`Yes<MIPS-System-emulator>`
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- Yes
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- Venerable RISC architecture originally out of Stanford University
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* - OpenRISC
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- :ref:`Yes<OpenRISC-System-emulator>`
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- Yes
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- Open source RISC architecture developed by the OpenRISC community
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* - Power (ppc, ppc64)
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- :ref:`Yes<PowerPC-System-emulator>`
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- Yes
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- A general purpose RISC architecture now managed by IBM
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* - RISC-V
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- :ref:`Yes<RISC-V-System-emulator>`
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- Yes
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- An open standard RISC ISA maintained by RISC-V International
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* - RX
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- :ref:`Yes<RX-System-emulator>`
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- No
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- A 32 bit micro controller developed by Renesas
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* - s390x
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- :ref:`Yes<s390x-System-emulator>`
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- Yes
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- A 64 bit CPU found in IBM's System Z mainframes
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* - sh4
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- Yes
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- Yes
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- A 32 bit RISC embedded CPU developed by Hitachi
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* - SPARC (sparc, sparc64)
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- :ref:`Yes<Sparc32-System-emulator>`
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- Yes
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- A RISC ISA originally developed by Sun Microsystems
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* - Tricore
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- Yes
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- No
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- A 32 bit RISC/uController/DSP developed by Infineon
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* - Xtensa
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- :ref:`Yes<Xtensa-System-emulator>`
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- Yes
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- A configurable 32 bit soft core now owned by Cadence
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.. _Semihosting:
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Semihosting
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-----------
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Semihosting is a feature defined by the owner of the architecture to
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allow programs to interact with a debugging host system. On real
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hardware this is usually provided by an In-circuit emulator (ICE)
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hooked directly to the board. QEMU's implementation allows for
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semihosting calls to be passed to the host system or via the
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``gdbstub``.
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Generally semihosting makes it easier to bring up low level code before a
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more fully functional operating system has been enabled. On QEMU it
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also allows for embedded micro-controller code which typically doesn't
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have a full libc to be run as "bare-metal" code under QEMU's user-mode
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emulation. It is also useful for writing test cases and indeed a
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number of compiler suites as well as QEMU itself use semihosting calls
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to exit test code while reporting the success state.
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Semihosting is only available using TCG emulation. This is because the
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instructions to trigger a semihosting call are typically reserved
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causing most hypervisors to trap and fault on them.
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.. warning::
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Semihosting inherently bypasses any isolation there may be between
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the guest and the host. As a result a program using semihosting can
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happily trash your host system. Some semihosting calls (e.g.
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``SYS_READC``) can block execution indefinitely. You should only
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ever run trusted code with semihosting enabled.
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Redirection
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~~~~~~~~~~~
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Semihosting calls can be re-directed to a (potentially remote) gdb
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during debugging via the :ref:`gdbstub<GDB usage>`. Output to the
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semihosting console is configured as a ``chardev`` so can be
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redirected to a file, pipe or socket like any other ``chardev``
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device.
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Supported Targets
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~~~~~~~~~~~~~~~~~
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Most targets offer similar semihosting implementations with some
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minor changes to define the appropriate instruction to encode the
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semihosting call and which registers hold the parameters. They tend to
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presents a simple POSIX-like API which allows your program to read and
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write files, access the console and some other basic interactions.
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For full details of the ABI for a particular target, and the set of
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calls it provides, you should consult the semihosting specification
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for that architecture.
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.. note::
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QEMU makes an implementation decision to implement all file
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access in ``O_BINARY`` mode. The user-visible effect of this is
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regardless of the text/binary mode the program sets QEMU will
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always select a binary mode ensuring no line-terminator conversion
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is performed on input or output. This is because gdb semihosting
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support doesn't make the distinction between the modes and
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magically processing line endings can be confusing.
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.. list-table:: Guest Architectures supporting Semihosting
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:widths: 10 10 80
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:header-rows: 1
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* - Architecture
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- Modes
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- Specification
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* - Arm
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- System and User-mode
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- https://github.com/ARM-software/abi-aa/blob/main/semihosting/semihosting.rst
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* - m68k
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- System
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- https://sourceware.org/git/?p=newlib-cygwin.git;a=blob;f=libgloss/m68k/m68k-semi.txt;hb=HEAD
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* - MIPS
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- System
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- Unified Hosting Interface (MD01069)
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* - RISC-V
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- System and User-mode
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- https://github.com/riscv/riscv-semihosting-spec/blob/main/riscv-semihosting-spec.adoc
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* - Xtensa
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- System
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- Tensilica ISS SIMCALL
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TCG Plugins
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-----------
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QEMU TCG plugins provide a way for users to run experiments taking
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advantage of the total system control emulation can have over a guest.
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It provides a mechanism for plugins to subscribe to events during
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translation and execution and optionally callback into the plugin
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during these events. TCG plugins are unable to change the system state
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only monitor it passively. However they can do this down to an
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individual instruction granularity including potentially subscribing
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to all load and store operations.
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See the developer section of the manual for details about
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:ref:`writing plugins<TCG Plugins>`.
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Usage
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~~~~~
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Any QEMU binary with TCG support has plugins enabled by default.
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Earlier releases needed to be explicitly enabled with::
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configure --enable-plugins
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Once built a program can be run with multiple plugins loaded each with
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their own arguments::
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$QEMU $OTHER_QEMU_ARGS \
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-plugin contrib/plugin/libhowvec.so,inline=on,count=hint \
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-plugin contrib/plugin/libhotblocks.so
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Arguments are plugin specific and can be used to modify their
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behaviour. In this case the howvec plugin is being asked to use inline
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ops to count and break down the hint instructions by type.
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Linux user-mode emulation also evaluates the environment variable
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``QEMU_PLUGIN``::
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QEMU_PLUGIN="file=contrib/plugins/libhowvec.so,inline=on,count=hint" $QEMU
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Example Plugins
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~~~~~~~~~~~~~~~
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There are a number of plugins included with QEMU and you are
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encouraged to contribute your own plugins plugins upstream. There is a
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``contrib/plugins`` directory where they can go. There are also some
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basic plugins that are used to test and exercise the API during the
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``make check-tcg`` target in ``tests/tcg/plugins`` that are never the
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less useful for basic analysis.
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Empty
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.....
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``tests/tcg/plugins/empty.c``
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Purely a test plugin for measuring the overhead of the plugins system
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itself. Does no instrumentation.
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Basic Blocks
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............
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``tests/tcg/plugins/bb.c``
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A very basic plugin which will measure execution in coarse terms as
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each basic block is executed. By default the results are shown once
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execution finishes::
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$ qemu-aarch64 -plugin tests/plugin/libbb.so \
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-d plugin ./tests/tcg/aarch64-linux-user/sha1
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SHA1=15dd99a1991e0b3826fede3deffc1feba42278e6
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bb's: 2277338, insns: 158483046
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Behaviour can be tweaked with the following arguments:
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.. list-table:: Basic Block plugin arguments
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:widths: 20 80
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:header-rows: 1
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* - Option
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- Description
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* - inline=true|false
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- Use faster inline addition of a single counter. Not per-cpu and not
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thread safe.
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* - idle=true|false
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- Dump the current execution stats whenever the guest vCPU idles
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Instruction
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...........
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``tests/tcg/plugins/insn.c``
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This is a basic instruction level instrumentation which can count the
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number of instructions executed on each core/thread::
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$ qemu-aarch64 -plugin tests/plugin/libinsn.so \
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-d plugin ./tests/tcg/aarch64-linux-user/threadcount
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Created 10 threads
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Done
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cpu 0 insns: 46765
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cpu 1 insns: 3694
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cpu 2 insns: 3694
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cpu 3 insns: 2994
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cpu 4 insns: 1497
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cpu 5 insns: 1497
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cpu 6 insns: 1497
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cpu 7 insns: 1497
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total insns: 63135
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Behaviour can be tweaked with the following arguments:
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.. list-table:: Instruction plugin arguments
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:widths: 20 80
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:header-rows: 1
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* - Option
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- Description
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* - inline=true|false
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- Use faster inline addition of a single counter.
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* - sizes=true|false
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- Give a summary of the instruction sizes for the execution
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* - match=<string>
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- Only instrument instructions matching the string prefix
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The ``match`` option will show some basic stats including how many
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instructions have executed since the last execution. For
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example::
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$ qemu-aarch64 -plugin tests/plugin/libinsn.so,match=bl \
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-d plugin ./tests/tcg/aarch64-linux-user/sha512-vector
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...
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0x40069c, 'bl #0x4002b0', 10 hits, 1093 match hits, Δ+1257 since last match, 98 avg insns/match
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0x4006ac, 'bl #0x403690', 10 hits, 1094 match hits, Δ+47 since last match, 98 avg insns/match
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0x4037fc, 'bl #0x4002b0', 18 hits, 1095 match hits, Δ+22 since last match, 98 avg insns/match
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0x400720, 'bl #0x403690', 10 hits, 1096 match hits, Δ+58 since last match, 98 avg insns/match
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0x4037fc, 'bl #0x4002b0', 19 hits, 1097 match hits, Δ+22 since last match, 98 avg insns/match
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0x400730, 'bl #0x403690', 10 hits, 1098 match hits, Δ+33 since last match, 98 avg insns/match
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0x4037ac, 'bl #0x4002b0', 12 hits, 1099 match hits, Δ+20 since last match, 98 avg insns/match
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...
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For more detailed execution tracing see the ``execlog`` plugin for
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other options.
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Memory
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......
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``tests/tcg/plugins/mem.c``
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Basic instruction level memory instrumentation::
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$ qemu-aarch64 -plugin tests/plugin/libmem.so,inline=true \
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-d plugin ./tests/tcg/aarch64-linux-user/sha1
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SHA1=15dd99a1991e0b3826fede3deffc1feba42278e6
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inline mem accesses: 79525013
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Behaviour can be tweaked with the following arguments:
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.. list-table:: Memory plugin arguments
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:widths: 20 80
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:header-rows: 1
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* - Option
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- Description
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* - inline=true|false
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- Use faster inline addition of a single counter
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* - callback=true|false
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- Use callbacks on each memory instrumentation.
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* - hwaddr=true|false
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- Count IO accesses (only for system emulation)
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System Calls
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............
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``tests/tcg/plugins/syscall.c``
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A basic syscall tracing plugin. This only works for user-mode. By
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default it will give a summary of syscall stats at the end of the
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run::
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$ qemu-aarch64 -plugin tests/plugin/libsyscall \
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-d plugin ./tests/tcg/aarch64-linux-user/threadcount
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Created 10 threads
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Done
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syscall no. calls errors
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226 12 0
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99 11 11
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115 11 0
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222 11 0
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93 10 0
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220 10 0
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233 10 0
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215 8 0
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214 4 0
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134 2 0
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64 2 0
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96 1 0
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94 1 0
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80 1 0
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261 1 0
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78 1 0
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160 1 0
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135 1 0
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Hot Blocks
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..........
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``contrib/plugins/hotblocks.c``
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The hotblocks plugin allows you to examine the where hot paths of
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execution are in your program. Once the program has finished you will
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get a sorted list of blocks reporting the starting PC, translation
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count, number of instructions and execution count. This will work best
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with linux-user execution as system emulation tends to generate
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re-translations as blocks from different programs get swapped in and
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out of system memory.
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If your program is single-threaded you can use the ``inline`` option for
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slightly faster (but not thread safe) counters.
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Example::
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$ qemu-aarch64 \
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-plugin contrib/plugins/libhotblocks.so -d plugin \
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./tests/tcg/aarch64-linux-user/sha1
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SHA1=15dd99a1991e0b3826fede3deffc1feba42278e6
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collected 903 entries in the hash table
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pc, tcount, icount, ecount
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0x0000000041ed10, 1, 5, 66087
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0x000000004002b0, 1, 4, 66087
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...
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Hot Pages
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.........
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``contrib/plugins/hotpages.c``
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Similar to hotblocks but this time tracks memory accesses::
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$ qemu-aarch64 \
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-plugin contrib/plugins/libhotpages.so -d plugin \
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./tests/tcg/aarch64-linux-user/sha1
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SHA1=15dd99a1991e0b3826fede3deffc1feba42278e6
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Addr, RCPUs, Reads, WCPUs, Writes
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0x000055007fe000, 0x0001, 31747952, 0x0001, 8835161
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0x000055007ff000, 0x0001, 29001054, 0x0001, 8780625
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0x00005500800000, 0x0001, 687465, 0x0001, 335857
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0x0000000048b000, 0x0001, 130594, 0x0001, 355
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0x0000000048a000, 0x0001, 1826, 0x0001, 11
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The hotpages plugin can be configured using the following arguments:
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.. list-table:: Hot pages arguments
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:widths: 20 80
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:header-rows: 1
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* - Option
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- Description
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* - sortby=reads|writes|address
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- Log the data sorted by either the number of reads, the number of writes, or
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memory address. (Default: entries are sorted by the sum of reads and writes)
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* - io=on
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- Track IO addresses. Only relevant to full system emulation. (Default: off)
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* - pagesize=N
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- The page size used. (Default: N = 4096)
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Instruction Distribution
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........................
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``contrib/plugins/howvec.c``
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This is an instruction classifier so can be used to count different
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types of instructions. It has a number of options to refine which get
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counted. You can give a value to the ``count`` argument for a class of
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instructions to break it down fully, so for example to see all the system
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registers accesses::
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$ qemu-system-aarch64 $(QEMU_ARGS) \
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-append "root=/dev/sda2 systemd.unit=benchmark.service" \
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-smp 4 -plugin ./contrib/plugins/libhowvec.so,count=sreg -d plugin
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which will lead to a sorted list after the class breakdown::
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Instruction Classes:
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Class: UDEF not counted
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Class: SVE (68 hits)
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Class: PCrel addr (47789483 hits)
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Class: Add/Sub (imm) (192817388 hits)
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Class: Logical (imm) (93852565 hits)
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Class: Move Wide (imm) (76398116 hits)
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Class: Bitfield (44706084 hits)
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Class: Extract (5499257 hits)
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Class: Cond Branch (imm) (147202932 hits)
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Class: Exception Gen (193581 hits)
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Class: NOP not counted
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Class: Hints (6652291 hits)
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Class: Barriers (8001661 hits)
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Class: PSTATE (1801695 hits)
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Class: System Insn (6385349 hits)
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Class: System Reg counted individually
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Class: Branch (reg) (69497127 hits)
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Class: Branch (imm) (84393665 hits)
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Class: Cmp & Branch (110929659 hits)
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Class: Tst & Branch (44681442 hits)
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Class: AdvSimd ldstmult (736 hits)
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Class: ldst excl (9098783 hits)
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Class: Load Reg (lit) (87189424 hits)
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Class: ldst noalloc pair (3264433 hits)
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Class: ldst pair (412526434 hits)
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Class: ldst reg (imm) (314734576 hits)
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Class: Loads & Stores (2117774 hits)
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Class: Data Proc Reg (223519077 hits)
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Class: Scalar FP (31657954 hits)
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Individual Instructions:
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Instr: mrs x0, sp_el0 (2682661 hits) (op=0xd5384100/ System Reg)
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Instr: mrs x1, tpidr_el2 (1789339 hits) (op=0xd53cd041/ System Reg)
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|
Instr: mrs x2, tpidr_el2 (1513494 hits) (op=0xd53cd042/ System Reg)
|
|
Instr: mrs x0, tpidr_el2 (1490823 hits) (op=0xd53cd040/ System Reg)
|
|
Instr: mrs x1, sp_el0 (933793 hits) (op=0xd5384101/ System Reg)
|
|
Instr: mrs x2, sp_el0 (699516 hits) (op=0xd5384102/ System Reg)
|
|
Instr: mrs x4, tpidr_el2 (528437 hits) (op=0xd53cd044/ System Reg)
|
|
Instr: mrs x30, ttbr1_el1 (480776 hits) (op=0xd538203e/ System Reg)
|
|
Instr: msr ttbr1_el1, x30 (480713 hits) (op=0xd518203e/ System Reg)
|
|
Instr: msr vbar_el1, x30 (480671 hits) (op=0xd518c01e/ System Reg)
|
|
...
|
|
|
|
To find the argument shorthand for the class you need to examine the
|
|
source code of the plugin at the moment, specifically the ``*opt``
|
|
argument in the InsnClassExecCount tables.
|
|
|
|
Lockstep Execution
|
|
..................
|
|
|
|
``contrib/plugins/lockstep.c``
|
|
|
|
This is a debugging tool for developers who want to find out when and
|
|
where execution diverges after a subtle change to TCG code generation.
|
|
It is not an exact science and results are likely to be mixed once
|
|
asynchronous events are introduced. While the use of -icount can
|
|
introduce determinism to the execution flow it doesn't always follow
|
|
the translation sequence will be exactly the same. Typically this is
|
|
caused by a timer firing to service the GUI causing a block to end
|
|
early. However in some cases it has proved to be useful in pointing
|
|
people at roughly where execution diverges. The only argument you need
|
|
for the plugin is a path for the socket the two instances will
|
|
communicate over::
|
|
|
|
|
|
$ qemu-system-sparc -monitor none -parallel none \
|
|
-net none -M SS-20 -m 256 -kernel day11/zImage.elf \
|
|
-plugin ./contrib/plugins/liblockstep.so,sockpath=lockstep-sparc.sock \
|
|
-d plugin,nochain
|
|
|
|
which will eventually report::
|
|
|
|
qemu-system-sparc: warning: nic lance.0 has no peer
|
|
@ 0x000000ffd06678 vs 0x000000ffd001e0 (2/1 since last)
|
|
@ 0x000000ffd07d9c vs 0x000000ffd06678 (3/1 since last)
|
|
Δ insn_count @ 0x000000ffd07d9c (809900609) vs 0x000000ffd06678 (809900612)
|
|
previously @ 0x000000ffd06678/10 (809900609 insns)
|
|
previously @ 0x000000ffd001e0/4 (809900599 insns)
|
|
previously @ 0x000000ffd080ac/2 (809900595 insns)
|
|
previously @ 0x000000ffd08098/5 (809900593 insns)
|
|
previously @ 0x000000ffd080c0/1 (809900588 insns)
|
|
|
|
|
|
Hardware Profile
|
|
................
|
|
|
|
``contrib/plugins/hwprofile.c``
|
|
|
|
The hwprofile tool can only be used with system emulation and allows
|
|
the user to see what hardware is accessed how often. It has a number of options:
|
|
|
|
.. list-table:: Hardware Profile arguments
|
|
:widths: 20 80
|
|
:header-rows: 1
|
|
|
|
* - Option
|
|
- Description
|
|
* - track=[read|write]
|
|
- By default the plugin tracks both reads and writes. You can use
|
|
this option to limit the tracking to just one class of accesses.
|
|
* - source
|
|
- Will include a detailed break down of what the guest PC that made the
|
|
access was. Not compatible with the pattern option. Example output::
|
|
|
|
cirrus-low-memory @ 0xfffffd00000a0000
|
|
pc:fffffc0000005cdc, 1, 256
|
|
pc:fffffc0000005ce8, 1, 256
|
|
pc:fffffc0000005cec, 1, 256
|
|
|
|
* - pattern
|
|
- Instead break down the accesses based on the offset into the HW
|
|
region. This can be useful for seeing the most used registers of
|
|
a device. Example output::
|
|
|
|
pci0-conf @ 0xfffffd01fe000000
|
|
off:00000004, 1, 1
|
|
off:00000010, 1, 3
|
|
off:00000014, 1, 3
|
|
off:00000018, 1, 2
|
|
off:0000001c, 1, 2
|
|
off:00000020, 1, 2
|
|
...
|
|
|
|
|
|
Execution Log
|
|
.............
|
|
|
|
``contrib/plugins/execlog.c``
|
|
|
|
The execlog tool traces executed instructions with memory access. It can be used
|
|
for debugging and security analysis purposes.
|
|
Please be aware that this will generate a lot of output.
|
|
|
|
The plugin needs default argument::
|
|
|
|
$ qemu-system-arm $(QEMU_ARGS) \
|
|
-plugin ./contrib/plugins/libexeclog.so -d plugin
|
|
|
|
which will output an execution trace following this structure::
|
|
|
|
# vCPU, vAddr, opcode, disassembly[, load/store, memory addr, device]...
|
|
0, 0xa12, 0xf8012400, "movs r4, #0"
|
|
0, 0xa14, 0xf87f42b4, "cmp r4, r6"
|
|
0, 0xa16, 0xd206, "bhs #0xa26"
|
|
0, 0xa18, 0xfff94803, "ldr r0, [pc, #0xc]", load, 0x00010a28, RAM
|
|
0, 0xa1a, 0xf989f000, "bl #0xd30"
|
|
0, 0xd30, 0xfff9b510, "push {r4, lr}", store, 0x20003ee0, RAM, store, 0x20003ee4, RAM
|
|
0, 0xd32, 0xf9893014, "adds r0, #0x14"
|
|
0, 0xd34, 0xf9c8f000, "bl #0x10c8"
|
|
0, 0x10c8, 0xfff96c43, "ldr r3, [r0, #0x44]", load, 0x200000e4, RAM
|
|
|
|
Please note that you need to configure QEMU with Capstone support to get disassembly.
|
|
|
|
The output can be filtered to only track certain instructions or
|
|
addresses using the ``ifilter`` or ``afilter`` options. You can stack the
|
|
arguments if required::
|
|
|
|
$ qemu-system-arm $(QEMU_ARGS) \
|
|
-plugin ./contrib/plugins/libexeclog.so,ifilter=st1w,afilter=0x40001808 -d plugin
|
|
|
|
This plugin can also dump registers when they change value. Specify the name of the
|
|
registers with multiple ``reg`` options. You can also use glob style matching if you wish::
|
|
|
|
$ qemu-system-arm $(QEMU_ARGS) \
|
|
-plugin ./contrib/plugins/libexeclog.so,reg=\*_el2,reg=sp -d plugin
|
|
|
|
Be aware that each additional register to check will slow down
|
|
execution quite considerably. You can optimise the number of register
|
|
checks done by using the rdisas option. This will only instrument
|
|
instructions that mention the registers in question in disassembly.
|
|
This is not foolproof as some instructions implicitly change
|
|
instructions. You can use the ifilter to catch these cases::
|
|
|
|
$ qemu-system-arm $(QEMU_ARGS) \
|
|
-plugin ./contrib/plugins/libexeclog.so,ifilter=msr,ifilter=blr,reg=x30,reg=\*_el1,rdisas=on
|
|
|
|
Cache Modelling
|
|
...............
|
|
|
|
``contrib/plugins/cache.c``
|
|
|
|
Cache modelling plugin that measures the performance of a given L1 cache
|
|
configuration, and optionally a unified L2 per-core cache when a given working
|
|
set is run::
|
|
|
|
$ qemu-x86_64 -plugin ./contrib/plugins/libcache.so \
|
|
-d plugin -D cache.log ./tests/tcg/x86_64-linux-user/float_convs
|
|
|
|
will report the following::
|
|
|
|
core #, data accesses, data misses, dmiss rate, insn accesses, insn misses, imiss rate
|
|
0 996695 508 0.0510% 2642799 18617 0.7044%
|
|
|
|
address, data misses, instruction
|
|
0x424f1e (_int_malloc), 109, movq %rax, 8(%rcx)
|
|
0x41f395 (_IO_default_xsputn), 49, movb %dl, (%rdi, %rax)
|
|
0x42584d (ptmalloc_init.part.0), 33, movaps %xmm0, (%rax)
|
|
0x454d48 (__tunables_init), 20, cmpb $0, (%r8)
|
|
...
|
|
|
|
address, fetch misses, instruction
|
|
0x4160a0 (__vfprintf_internal), 744, movl $1, %ebx
|
|
0x41f0a0 (_IO_setb), 744, endbr64
|
|
0x415882 (__vfprintf_internal), 744, movq %r12, %rdi
|
|
0x4268a0 (__malloc), 696, andq $0xfffffffffffffff0, %rax
|
|
...
|
|
|
|
The plugin has a number of arguments, all of them are optional:
|
|
|
|
.. list-table:: Cache modelling arguments
|
|
:widths: 20 80
|
|
:header-rows: 1
|
|
|
|
* - Option
|
|
- Description
|
|
* - limit=N
|
|
- Print top N icache and dcache thrashing instructions along with
|
|
their address, number of misses, and its disassembly. (default: 32)
|
|
* - icachesize=N
|
|
iblksize=B
|
|
iassoc=A
|
|
- Instruction cache configuration arguments. They specify the
|
|
cache size, block size, and associativity of the instruction
|
|
cache, respectively. (default: N = 16384, B = 64, A = 8)
|
|
* - dcachesize=N
|
|
- Data cache size (default: 16834)
|
|
* - dblksize=B
|
|
- Data cache block size (default: 64)
|
|
* - dassoc=A
|
|
- Data cache associativity (default: 8)
|
|
* - evict=POLICY
|
|
- Sets the eviction policy to POLICY. Available policies are:
|
|
``lru``, ``fifo``, and ``rand``. The plugin will use
|
|
the specified policy for both instruction and data caches.
|
|
(default: POLICY = ``lru``)
|
|
* - cores=N
|
|
- Sets the number of cores for which we maintain separate icache
|
|
and dcache. (default: for linux-user, N = 1, for full system
|
|
emulation: N = cores available to guest)
|
|
* - l2=on
|
|
- Simulates a unified L2 cache (stores blocks for both
|
|
instructions and data) using the default L2 configuration (cache
|
|
size = 2MB, associativity = 16-way, block size = 64B).
|
|
* - l2cachesize=N
|
|
- L2 cache size (default: 2097152 (2MB)), implies ``l2=on``
|
|
* - l2blksize=B
|
|
- L2 cache block size (default: 64), implies ``l2=on``
|
|
* - l2assoc=A
|
|
- L2 cache associativity (default: 16), implies ``l2=on``
|
|
|
|
Stop on Trigger
|
|
...............
|
|
|
|
``contrib/plugins/stoptrigger.c``
|
|
|
|
The stoptrigger plugin allows to setup triggers to stop emulation.
|
|
It can be used for research purposes to launch some code and precisely stop it
|
|
and understand where its execution flow went.
|
|
|
|
Two types of triggers can be configured: a count of instructions to stop at,
|
|
or an address to stop at. Multiple triggers can be set at once.
|
|
|
|
By default, QEMU will exit with return code 0. A custom return code can be
|
|
configured for each trigger using ``:CODE`` syntax.
|
|
|
|
For example, to stop at the 20-th instruction with return code 41, at address
|
|
0xd4 with return code 0 or at address 0xd8 with return code 42::
|
|
|
|
$ qemu-system-aarch64 $(QEMU_ARGS) \
|
|
-plugin ./contrib/plugins/libstoptrigger.so,icount=20:41,addr=0xd4,addr=0xd8:42 -d plugin
|
|
|
|
The plugin will log the reason of exit, for example::
|
|
|
|
0xd4 reached, exiting
|
|
|
|
Other emulation features
|
|
------------------------
|
|
|
|
When running system emulation you can also enable deterministic
|
|
execution which allows for repeatable record/replay debugging. See
|
|
:ref:`Record/Replay<replay>` for more details.
|
|
|