23ddbf08bf
Variable physaddr is a host address which should be represented by data type 'uintptr_t'. This is needed for w64 and changes nothing for other hosts. v2: Rename physaddr -> hostaddr (suggested by Blue Swirl). Signed-off-by: Stefan Weil <sw@weilnetz.de>
237 lines
6.4 KiB
C
237 lines
6.4 KiB
C
/*
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* Software MMU support
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*
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* Generate inline load/store functions for one MMU mode and data
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* size.
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*
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* Generate a store function as well as signed and unsigned loads. For
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* 32 and 64 bit cases, also generate floating point functions with
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* the same size.
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*
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* Not used directly but included from softmmu_exec.h and exec-all.h.
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*
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* Copyright (c) 2003 Fabrice Bellard
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#if DATA_SIZE == 8
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#define SUFFIX q
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#define USUFFIX q
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#define DATA_TYPE uint64_t
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#elif DATA_SIZE == 4
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#define SUFFIX l
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#define USUFFIX l
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#define DATA_TYPE uint32_t
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#elif DATA_SIZE == 2
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#define SUFFIX w
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#define USUFFIX uw
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#define DATA_TYPE uint16_t
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#define DATA_STYPE int16_t
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#elif DATA_SIZE == 1
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#define SUFFIX b
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#define USUFFIX ub
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#define DATA_TYPE uint8_t
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#define DATA_STYPE int8_t
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#else
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#error unsupported data size
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#endif
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#if ACCESS_TYPE < (NB_MMU_MODES)
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#define CPU_MMU_INDEX ACCESS_TYPE
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#define MMUSUFFIX _mmu
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#elif ACCESS_TYPE == (NB_MMU_MODES)
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#define CPU_MMU_INDEX (cpu_mmu_index(env))
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#define MMUSUFFIX _mmu
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#elif ACCESS_TYPE == (NB_MMU_MODES + 1)
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#define CPU_MMU_INDEX (cpu_mmu_index(env))
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#define MMUSUFFIX _cmmu
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#else
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#error invalid ACCESS_TYPE
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#endif
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#if DATA_SIZE == 8
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#define RES_TYPE uint64_t
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#else
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#define RES_TYPE uint32_t
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#endif
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#if ACCESS_TYPE == (NB_MMU_MODES + 1)
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#define ADDR_READ addr_code
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#else
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#define ADDR_READ addr_read
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#endif
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#ifndef CONFIG_TCG_PASS_AREG0
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#define ENV_PARAM
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#define ENV_VAR
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#define CPU_PREFIX
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#define HELPER_PREFIX __
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#else
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#define ENV_PARAM CPUArchState *env,
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#define ENV_VAR env,
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#define CPU_PREFIX cpu_
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#define HELPER_PREFIX helper_
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#endif
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/* generic load/store macros */
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static inline RES_TYPE
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glue(glue(glue(CPU_PREFIX, ld), USUFFIX), MEMSUFFIX)(ENV_PARAM
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target_ulong ptr)
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{
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int page_index;
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RES_TYPE res;
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target_ulong addr;
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int mmu_idx;
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addr = ptr;
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page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
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mmu_idx = CPU_MMU_INDEX;
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if (unlikely(env->tlb_table[mmu_idx][page_index].ADDR_READ !=
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(addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) {
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res = glue(glue(glue(HELPER_PREFIX, ld), SUFFIX), MMUSUFFIX)(ENV_VAR
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addr,
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mmu_idx);
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} else {
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uintptr_t hostaddr = addr + env->tlb_table[mmu_idx][page_index].addend;
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res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)hostaddr);
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}
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return res;
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}
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#if DATA_SIZE <= 2
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static inline int
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glue(glue(glue(CPU_PREFIX, lds), SUFFIX), MEMSUFFIX)(ENV_PARAM
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target_ulong ptr)
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{
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int res, page_index;
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target_ulong addr;
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int mmu_idx;
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addr = ptr;
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page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
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mmu_idx = CPU_MMU_INDEX;
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if (unlikely(env->tlb_table[mmu_idx][page_index].ADDR_READ !=
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(addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) {
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res = (DATA_STYPE)glue(glue(glue(HELPER_PREFIX, ld), SUFFIX),
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MMUSUFFIX)(ENV_VAR addr, mmu_idx);
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} else {
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uintptr_t hostaddr = addr + env->tlb_table[mmu_idx][page_index].addend;
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res = glue(glue(lds, SUFFIX), _raw)((uint8_t *)hostaddr);
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}
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return res;
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}
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#endif
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#if ACCESS_TYPE != (NB_MMU_MODES + 1)
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/* generic store macro */
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static inline void
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glue(glue(glue(CPU_PREFIX, st), SUFFIX), MEMSUFFIX)(ENV_PARAM target_ulong ptr,
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RES_TYPE v)
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{
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int page_index;
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target_ulong addr;
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int mmu_idx;
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addr = ptr;
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page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
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mmu_idx = CPU_MMU_INDEX;
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if (unlikely(env->tlb_table[mmu_idx][page_index].addr_write !=
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(addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) {
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glue(glue(glue(HELPER_PREFIX, st), SUFFIX), MMUSUFFIX)(ENV_VAR addr, v,
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mmu_idx);
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} else {
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uintptr_t hostaddr = addr + env->tlb_table[mmu_idx][page_index].addend;
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glue(glue(st, SUFFIX), _raw)((uint8_t *)hostaddr, v);
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}
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}
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#endif /* ACCESS_TYPE != (NB_MMU_MODES + 1) */
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#if ACCESS_TYPE != (NB_MMU_MODES + 1)
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#if DATA_SIZE == 8
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static inline float64 glue(glue(CPU_PREFIX, ldfq), MEMSUFFIX)(ENV_PARAM
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target_ulong ptr)
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{
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union {
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float64 d;
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uint64_t i;
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} u;
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u.i = glue(glue(CPU_PREFIX, ldq), MEMSUFFIX)(ENV_VAR ptr);
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return u.d;
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}
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static inline void glue(glue(CPU_PREFIX, stfq), MEMSUFFIX)(ENV_PARAM
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target_ulong ptr,
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float64 v)
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{
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union {
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float64 d;
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uint64_t i;
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} u;
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u.d = v;
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glue(glue(CPU_PREFIX, stq), MEMSUFFIX)(ENV_VAR ptr, u.i);
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}
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#endif /* DATA_SIZE == 8 */
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#if DATA_SIZE == 4
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static inline float32 glue(glue(CPU_PREFIX, ldfl), MEMSUFFIX)(ENV_PARAM
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target_ulong ptr)
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{
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union {
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float32 f;
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uint32_t i;
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} u;
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u.i = glue(glue(CPU_PREFIX, ldl), MEMSUFFIX)(ENV_VAR ptr);
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return u.f;
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}
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static inline void glue(glue(CPU_PREFIX, stfl), MEMSUFFIX)(ENV_PARAM
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target_ulong ptr,
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float32 v)
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{
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union {
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float32 f;
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uint32_t i;
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} u;
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u.f = v;
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glue(glue(CPU_PREFIX, stl), MEMSUFFIX)(ENV_VAR ptr, u.i);
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}
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#endif /* DATA_SIZE == 4 */
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#endif /* ACCESS_TYPE != (NB_MMU_MODES + 1) */
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#undef RES_TYPE
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#undef DATA_TYPE
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#undef DATA_STYPE
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#undef SUFFIX
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#undef USUFFIX
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#undef DATA_SIZE
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#undef CPU_MMU_INDEX
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#undef MMUSUFFIX
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#undef ADDR_READ
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#undef ENV_PARAM
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#undef ENV_VAR
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#undef CPU_PREFIX
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#undef HELPER_PREFIX
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