qemu/target
Richard Henderson ded1db48c9 target/i386: Fix tss access size in switch_tss_ra
The two limit_max variables represent size - 1, just like the
encoding in the GDT, thus the 'old' access was off by one.
Access the minimal size of the new tss: the complete tss contains
the iopb, which may be a larger block than the access api expects,
and irrelevant because the iopb is not accessed during the
switch itself.

Fixes: 8b13106508 ("target/i386/tcg: use X86Access for TSS access")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2511
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20240819074052.207783-1-richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
2024-08-21 09:11:26 +10:00
..
alpha target: Set TCGCPUOps::cpu_exec_halt to target's has_work implementation 2024-07-11 11:41:34 +01:00
arm target/arm: Fix usage of MMU indexes when EL3 is AArch32 2024-08-13 11:44:53 +01:00
avr target: Set TCGCPUOps::cpu_exec_halt to target's has_work implementation 2024-07-11 11:41:34 +01:00
cris target: Set TCGCPUOps::cpu_exec_halt to target's has_work implementation 2024-07-11 11:41:34 +01:00
hexagon target/hexagon: don't look for static glib 2024-08-13 11:33:31 +02:00
hppa target: Set TCGCPUOps::cpu_exec_halt to target's has_work implementation 2024-07-11 11:41:34 +01:00
i386 target/i386: Fix tss access size in switch_tss_ra 2024-08-21 09:11:26 +10:00
loongarch target/loongarch: Fix helper_lddir() a CID INTEGER_OVERFLOW issue 2024-07-24 16:52:18 +08:00
m68k target/m68k: avoid shift into sign bit in dump_address_map() 2024-07-29 16:58:58 +01:00
microblaze target: Set TCGCPUOps::cpu_exec_halt to target's has_work implementation 2024-07-11 11:41:34 +01:00
mips target/mips: Load PTE as DATA 2024-08-20 00:38:48 +02:00
openrisc target: Set TCGCPUOps::cpu_exec_halt to target's has_work implementation 2024-07-11 11:41:34 +01:00
ppc target/ppc: Remove includes from mmu-book3s-v3.h 2024-07-26 09:51:34 +10:00
riscv target/riscv: Add asserts for out-of-bound access 2024-08-06 14:20:16 +10:00
rx target/rx: Use target_ulong for address in LI 2024-07-28 14:13:05 +10:00
s390x target/s390x: fix build warning (gcc-12 -fsanitize=thread) 2024-08-15 16:33:56 +02:00
sh4 target/sh4: Avoid shift into sign bit in update_itlb_use() 2024-07-29 17:00:20 +01:00
sparc target/sparc: Restrict STQF to sparcv9 2024-08-20 00:49:14 +02:00
tricore target/tricore: Use unsigned types for bitops in helper_eq_b() 2024-07-29 16:57:27 +01:00
xtensa target/xtensa: Correct assert condition in handle_interrupt() 2024-08-01 10:59:01 +01:00
Kconfig meson: make target endianneess available to Kconfig 2024-05-03 15:47:47 +02:00
meson.build exec: Expose 'target_page.h' API to user emulation 2024-04-26 15:28:11 +02:00