704afe34d8
No need to have our own definitions of these registers. Signed-off-by: Cameron Esfahani <dirty@apple.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
187 lines
4.8 KiB
C
187 lines
4.8 KiB
C
/*
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* Copyright (C) 2016 Veertu Inc,
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* Copyright (C) 2017 Google Inc,
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "qemu/osdep.h"
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#include "cpu.h"
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#include "qemu-common.h"
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#include "x86_decode.h"
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#include "x86_emu.h"
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#include "vmcs.h"
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#include "vmx.h"
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#include "x86_mmu.h"
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#include "x86_descr.h"
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/* static uint32_t x86_segment_access_rights(struct x86_segment_descriptor *var)
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{
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uint32_t ar;
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if (!var->p) {
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ar = 1 << 16;
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return ar;
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}
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ar = var->type & 15;
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ar |= (var->s & 1) << 4;
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ar |= (var->dpl & 3) << 5;
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ar |= (var->p & 1) << 7;
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ar |= (var->avl & 1) << 12;
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ar |= (var->l & 1) << 13;
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ar |= (var->db & 1) << 14;
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ar |= (var->g & 1) << 15;
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return ar;
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}*/
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bool x86_read_segment_descriptor(struct CPUState *cpu,
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struct x86_segment_descriptor *desc,
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x68_segment_selector sel)
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{
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target_ulong base;
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uint32_t limit;
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memset(desc, 0, sizeof(*desc));
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/* valid gdt descriptors start from index 1 */
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if (!sel.index && GDT_SEL == sel.ti) {
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return false;
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}
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if (GDT_SEL == sel.ti) {
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base = rvmcs(cpu->hvf->fd, VMCS_GUEST_GDTR_BASE);
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limit = rvmcs(cpu->hvf->fd, VMCS_GUEST_GDTR_LIMIT);
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} else {
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base = rvmcs(cpu->hvf->fd, VMCS_GUEST_LDTR_BASE);
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limit = rvmcs(cpu->hvf->fd, VMCS_GUEST_LDTR_LIMIT);
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}
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if (sel.index * 8 >= limit) {
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return false;
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}
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vmx_read_mem(cpu, desc, base + sel.index * 8, sizeof(*desc));
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return true;
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}
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bool x86_write_segment_descriptor(struct CPUState *cpu,
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struct x86_segment_descriptor *desc,
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x68_segment_selector sel)
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{
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target_ulong base;
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uint32_t limit;
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if (GDT_SEL == sel.ti) {
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base = rvmcs(cpu->hvf->fd, VMCS_GUEST_GDTR_BASE);
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limit = rvmcs(cpu->hvf->fd, VMCS_GUEST_GDTR_LIMIT);
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} else {
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base = rvmcs(cpu->hvf->fd, VMCS_GUEST_LDTR_BASE);
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limit = rvmcs(cpu->hvf->fd, VMCS_GUEST_LDTR_LIMIT);
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}
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if (sel.index * 8 >= limit) {
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printf("%s: gdt limit\n", __func__);
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return false;
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}
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vmx_write_mem(cpu, base + sel.index * 8, desc, sizeof(*desc));
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return true;
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}
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bool x86_read_call_gate(struct CPUState *cpu, struct x86_call_gate *idt_desc,
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int gate)
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{
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target_ulong base = rvmcs(cpu->hvf->fd, VMCS_GUEST_IDTR_BASE);
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uint32_t limit = rvmcs(cpu->hvf->fd, VMCS_GUEST_IDTR_LIMIT);
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memset(idt_desc, 0, sizeof(*idt_desc));
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if (gate * 8 >= limit) {
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printf("%s: idt limit\n", __func__);
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return false;
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}
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vmx_read_mem(cpu, idt_desc, base + gate * 8, sizeof(*idt_desc));
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return true;
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}
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bool x86_is_protected(struct CPUState *cpu)
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{
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uint64_t cr0 = rvmcs(cpu->hvf->fd, VMCS_GUEST_CR0);
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return cr0 & CR0_PE_MASK;
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}
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bool x86_is_real(struct CPUState *cpu)
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{
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return !x86_is_protected(cpu);
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}
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bool x86_is_v8086(struct CPUState *cpu)
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{
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X86CPU *x86_cpu = X86_CPU(cpu);
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CPUX86State *env = &x86_cpu->env;
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return x86_is_protected(cpu) && (env->eflags & VM_MASK);
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}
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bool x86_is_long_mode(struct CPUState *cpu)
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{
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return rvmcs(cpu->hvf->fd, VMCS_GUEST_IA32_EFER) & MSR_EFER_LMA;
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}
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bool x86_is_long64_mode(struct CPUState *cpu)
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{
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struct vmx_segment desc;
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vmx_read_segment_descriptor(cpu, &desc, R_CS);
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return x86_is_long_mode(cpu) && ((desc.ar >> 13) & 1);
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}
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bool x86_is_paging_mode(struct CPUState *cpu)
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{
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uint64_t cr0 = rvmcs(cpu->hvf->fd, VMCS_GUEST_CR0);
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return cr0 & CR0_PG_MASK;
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}
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bool x86_is_pae_enabled(struct CPUState *cpu)
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{
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uint64_t cr4 = rvmcs(cpu->hvf->fd, VMCS_GUEST_CR4);
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return cr4 & CR4_PAE_MASK;
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}
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target_ulong linear_addr(struct CPUState *cpu, target_ulong addr, X86Seg seg)
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{
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return vmx_read_segment_base(cpu, seg) + addr;
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}
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target_ulong linear_addr_size(struct CPUState *cpu, target_ulong addr, int size,
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X86Seg seg)
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{
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switch (size) {
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case 2:
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addr = (uint16_t)addr;
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break;
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case 4:
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addr = (uint32_t)addr;
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break;
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default:
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break;
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}
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return linear_addr(cpu, addr, seg);
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}
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target_ulong linear_rip(struct CPUState *cpu, target_ulong rip)
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{
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return linear_addr(cpu, rip, R_CS);
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}
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