Mark Cave-Ayland cffc331a31 cuda.c: add delay to setting of SR_INT bit ... MacOS 9 is racy when it comes to accessing the shift register. Fix this by introducing a small delay between data accesses and raising the SR_INT interrupt bit. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>		2015-11-12 13:15:55 +11:00
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cuda.c	cuda.c: add delay to setting of SR_INT bit	2015-11-12 13:15:55 +11:00
mac_dbdma.c	mac_dbdma: always clear FLUSH bit once DBDMA channel flush is complete	2015-09-20 22:48:38 +02:00
macio.c	macio: add to bridge category	2015-10-23 12:35:18 +11:00
Makefile.objs