5210977a85
On Sun, Jul 12, 2009 at 12:09 PM, Blue Swirl<blauwirbel@gmail.com> wrote: > On 7/12/09, Igor Kovalenko <igor.v.kovalenko@gmail.com> wrote: >> Good trap handling is required to process interrupts. >> This patch fixes the following: >> >> - sparc64 has no wim register >> - sparc64 has no psret register, use IE bit of pstate >> extract IE checking code to cpu_interrupts_enabled >> - alternate globals are not available if cpu has GL feature >> in this case bit AG of pstate is constant zero >> - write to pstate must actually write pstate >> even if cpu has GL feature >> >> Also timer interrupt is handled using do_interrupt. > > A bit too much for one patch. Please also remove the code instead of > commenting out. I now excluded timer interrupt related part. To my mind other changes are essentially tied together. > PUT_PSR for Sparc64 needs CC_OP = CC_OP_FLAGS; like Sparc32. Fixed, please find attached the updated version. -- Kind regards, Igor V. Kovalenko
58 lines
977 B
C
58 lines
977 B
C
#ifndef EXEC_SPARC_H
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#define EXEC_SPARC_H 1
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#include "config.h"
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#include "dyngen-exec.h"
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register struct CPUSPARCState *env asm(AREG0);
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#define DT0 (env->dt0)
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#define DT1 (env->dt1)
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#define QT0 (env->qt0)
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#define QT1 (env->qt1)
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#include "cpu.h"
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#include "exec-all.h"
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static inline void env_to_regs(void)
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{
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}
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static inline void regs_to_env(void)
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{
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}
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/* op_helper.c */
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void do_interrupt(CPUState *env);
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static inline int cpu_interrupts_enabled(CPUState *env1)
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{
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#if !defined (TARGET_SPARC64)
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if (env1->psret != 0)
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return 1;
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#else
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if (env1->pstate & PS_IE)
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return 1;
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#endif
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return 0;
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}
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static inline int cpu_has_work(CPUState *env1)
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{
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return (env1->interrupt_request & CPU_INTERRUPT_HARD) &&
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cpu_interrupts_enabled(env1);
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}
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static inline int cpu_halted(CPUState *env1) {
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if (!env1->halted)
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return 0;
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if (cpu_has_work(env1)) {
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env1->halted = 0;
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return 0;
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}
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return EXCP_HALTED;
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}
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#endif
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