qemu/target-sparc
Igor Kovalenko 5210977a85 sparc64: trap handling corrections
On Sun, Jul 12, 2009 at 12:09 PM, Blue Swirl<blauwirbel@gmail.com> wrote:
> On 7/12/09, Igor Kovalenko <igor.v.kovalenko@gmail.com> wrote:
>> Good trap handling is required to process interrupts.
>>  This patch fixes the following:
>>
>>  - sparc64 has no wim register
>>  - sparc64 has no psret register, use IE bit of pstate
>>   extract IE checking code to cpu_interrupts_enabled
>>  - alternate globals are not available if cpu has GL feature
>>   in this case bit AG of pstate is constant zero
>>  - write to pstate must actually write pstate
>>   even if cpu has GL feature
>>
>>  Also timer interrupt is handled using do_interrupt.
>
> A bit too much for one patch. Please also remove the code instead of
> commenting out.

I now excluded timer interrupt related part.
To my mind other changes are essentially tied together.

> PUT_PSR for Sparc64 needs CC_OP = CC_OP_FLAGS; like Sparc32.

Fixed, please find attached the updated version.

--
Kind regards,
Igor V. Kovalenko
2009-07-12 08:46:54 +00:00
..
cpu.h sparc64: trap handling corrections 2009-07-12 08:46:54 +00:00
exec.h sparc64: trap handling corrections 2009-07-12 08:46:54 +00:00
helper.c sparc64: trap handling corrections 2009-07-12 08:46:54 +00:00
helper.h Use dynamical computation for condition codes 2009-05-10 07:19:11 +00:00
machine.c Convert machine registration to use module init functions 2009-05-21 08:47:55 -05:00
op_helper.c sparc64: trap handling corrections 2009-07-12 08:46:54 +00:00
TODO Remove unnecessary trailing newlines 2008-12-13 09:32:43 +00:00
translate.c Use correct type for SPARC cpu_cc_op 2009-06-06 02:54:03 +01:00