216c07c3a8
Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
444 lines
12 KiB
C
444 lines
12 KiB
C
#include "hw/hw.h"
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#include "hw/boards.h"
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#include "hw/pc.h"
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#include "hw/isa.h"
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#include "host-utils.h"
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#include "exec-all.h"
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#include "kvm.h"
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static const VMStateDescription vmstate_segment = {
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.name = "segment",
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.version_id = 1,
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.minimum_version_id = 1,
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.minimum_version_id_old = 1,
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.fields = (VMStateField []) {
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VMSTATE_UINT32(selector, SegmentCache),
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VMSTATE_UINTTL(base, SegmentCache),
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VMSTATE_UINT32(limit, SegmentCache),
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VMSTATE_UINT32(flags, SegmentCache),
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VMSTATE_END_OF_LIST()
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}
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};
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static void cpu_put_seg(QEMUFile *f, SegmentCache *dt)
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{
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vmstate_save_state(f, &vmstate_segment, dt);
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}
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static void cpu_get_seg(QEMUFile *f, SegmentCache *dt)
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{
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vmstate_load_state(f, &vmstate_segment, dt, vmstate_segment.version_id);
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}
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static const VMStateDescription vmstate_xmm_reg = {
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.name = "xmm_reg",
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.version_id = 1,
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.minimum_version_id = 1,
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.minimum_version_id_old = 1,
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.fields = (VMStateField []) {
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VMSTATE_UINT64(XMM_Q(0), XMMReg),
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VMSTATE_UINT64(XMM_Q(1), XMMReg),
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VMSTATE_END_OF_LIST()
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}
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};
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static void cpu_put_xmm_reg(QEMUFile *f, XMMReg *xmm_reg)
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{
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vmstate_save_state(f, &vmstate_xmm_reg, xmm_reg);
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}
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static void cpu_get_xmm_reg(QEMUFile *f, XMMReg *xmm_reg)
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{
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vmstate_load_state(f, &vmstate_xmm_reg, xmm_reg, vmstate_xmm_reg.version_id);
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}
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static const VMStateDescription vmstate_mtrr_var = {
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.name = "mtrr_var",
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.version_id = 1,
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.minimum_version_id = 1,
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.minimum_version_id_old = 1,
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.fields = (VMStateField []) {
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VMSTATE_UINT64(base, MTRRVar),
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VMSTATE_UINT64(mask, MTRRVar),
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VMSTATE_END_OF_LIST()
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}
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};
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static void cpu_put_mtrr_var(QEMUFile *f, MTRRVar *mtrr_var)
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{
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vmstate_save_state(f, &vmstate_mtrr_var, mtrr_var);
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}
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static void cpu_get_mtrr_var(QEMUFile *f, MTRRVar *mtrr_var)
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{
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vmstate_load_state(f, &vmstate_mtrr_var, mtrr_var, vmstate_mtrr_var.version_id);
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}
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static void cpu_pre_save(void *opaque)
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{
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CPUState *env = opaque;
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int i, bit;
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cpu_synchronize_state(env);
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/* FPU */
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env->fpus_vmstate = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
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env->fptag_vmstate = 0;
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for(i = 0; i < 8; i++) {
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env->fptag_vmstate |= ((!env->fptags[i]) << i);
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}
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#ifdef USE_X86LDOUBLE
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env->fpregs_format_vmstate = 0;
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#else
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env->fpregs_format_vmstate = 1;
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#endif
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/* There can only be one pending IRQ set in the bitmap at a time, so try
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to find it and save its number instead (-1 for none). */
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env->pending_irq_vmstate = -1;
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for (i = 0; i < ARRAY_SIZE(env->interrupt_bitmap); i++) {
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if (env->interrupt_bitmap[i]) {
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bit = ctz64(env->interrupt_bitmap[i]);
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env->pending_irq_vmstate = i * 64 + bit;
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break;
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}
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}
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}
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void cpu_save(QEMUFile *f, void *opaque)
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{
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CPUState *env = opaque;
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int i;
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cpu_pre_save(opaque);
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for(i = 0; i < CPU_NB_REGS; i++)
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qemu_put_betls(f, &env->regs[i]);
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qemu_put_betls(f, &env->eip);
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qemu_put_betls(f, &env->eflags);
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qemu_put_be32s(f, &env->hflags);
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/* FPU */
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qemu_put_be16s(f, &env->fpuc);
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qemu_put_be16s(f, &env->fpus_vmstate);
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qemu_put_be16s(f, &env->fptag_vmstate);
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qemu_put_be16s(f, &env->fpregs_format_vmstate);
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for(i = 0; i < 8; i++) {
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#ifdef USE_X86LDOUBLE
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{
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uint64_t mant;
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uint16_t exp;
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/* we save the real CPU data (in case of MMX usage only 'mant'
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contains the MMX register */
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cpu_get_fp80(&mant, &exp, env->fpregs[i].d);
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qemu_put_be64(f, mant);
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qemu_put_be16(f, exp);
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}
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#else
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/* if we use doubles for float emulation, we save the doubles to
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avoid losing information in case of MMX usage. It can give
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problems if the image is restored on a CPU where long
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doubles are used instead. */
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qemu_put_be64(f, env->fpregs[i].mmx.MMX_Q(0));
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#endif
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}
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for(i = 0; i < 6; i++)
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cpu_put_seg(f, &env->segs[i]);
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cpu_put_seg(f, &env->ldt);
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cpu_put_seg(f, &env->tr);
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cpu_put_seg(f, &env->gdt);
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cpu_put_seg(f, &env->idt);
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qemu_put_be32s(f, &env->sysenter_cs);
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qemu_put_betls(f, &env->sysenter_esp);
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qemu_put_betls(f, &env->sysenter_eip);
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qemu_put_betls(f, &env->cr[0]);
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qemu_put_betls(f, &env->cr[2]);
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qemu_put_betls(f, &env->cr[3]);
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qemu_put_betls(f, &env->cr[4]);
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for(i = 0; i < 8; i++)
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qemu_put_betls(f, &env->dr[i]);
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/* MMU */
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qemu_put_sbe32s(f, &env->a20_mask);
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/* XMM */
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qemu_put_be32s(f, &env->mxcsr);
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for(i = 0; i < CPU_NB_REGS; i++) {
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cpu_put_xmm_reg(f, &env->xmm_regs[i]);
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}
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#ifdef TARGET_X86_64
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qemu_put_be64s(f, &env->efer);
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qemu_put_be64s(f, &env->star);
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qemu_put_be64s(f, &env->lstar);
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qemu_put_be64s(f, &env->cstar);
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qemu_put_be64s(f, &env->fmask);
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qemu_put_be64s(f, &env->kernelgsbase);
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#endif
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qemu_put_be32s(f, &env->smbase);
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qemu_put_be64s(f, &env->pat);
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qemu_put_be32s(f, &env->hflags2);
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qemu_put_be64s(f, &env->vm_hsave);
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qemu_put_be64s(f, &env->vm_vmcb);
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qemu_put_be64s(f, &env->tsc_offset);
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qemu_put_be64s(f, &env->intercept);
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qemu_put_be16s(f, &env->intercept_cr_read);
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qemu_put_be16s(f, &env->intercept_cr_write);
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qemu_put_be16s(f, &env->intercept_dr_read);
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qemu_put_be16s(f, &env->intercept_dr_write);
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qemu_put_be32s(f, &env->intercept_exceptions);
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qemu_put_8s(f, &env->v_tpr);
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/* MTRRs */
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for(i = 0; i < 11; i++)
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qemu_put_be64s(f, &env->mtrr_fixed[i]);
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qemu_put_be64s(f, &env->mtrr_deftype);
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for(i = 0; i < 8; i++) {
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cpu_put_mtrr_var(f, &env->mtrr_var[i]);
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}
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/* KVM-related states */
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qemu_put_sbe32s(f, &env->pending_irq_vmstate);
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qemu_put_be32s(f, &env->mp_state);
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qemu_put_be64s(f, &env->tsc);
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/* MCE */
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qemu_put_be64s(f, &env->mcg_cap);
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qemu_put_be64s(f, &env->mcg_status);
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qemu_put_be64s(f, &env->mcg_ctl);
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for (i = 0; i < MCE_BANKS_DEF * 4; i++) {
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qemu_put_be64s(f, &env->mce_banks[i]);
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}
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qemu_put_be64s(f, &env->tsc_aux);
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}
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#ifdef USE_X86LDOUBLE
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/* XXX: add that in a FPU generic layer */
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union x86_longdouble {
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uint64_t mant;
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uint16_t exp;
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};
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#define MANTD1(fp) (fp & ((1LL << 52) - 1))
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#define EXPBIAS1 1023
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#define EXPD1(fp) ((fp >> 52) & 0x7FF)
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#define SIGND1(fp) ((fp >> 32) & 0x80000000)
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static void fp64_to_fp80(union x86_longdouble *p, uint64_t temp)
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{
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int e;
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/* mantissa */
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p->mant = (MANTD1(temp) << 11) | (1LL << 63);
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/* exponent + sign */
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e = EXPD1(temp) - EXPBIAS1 + 16383;
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e |= SIGND1(temp) >> 16;
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p->exp = e;
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}
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#endif
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static int cpu_pre_load(void *opaque)
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{
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CPUState *env = opaque;
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cpu_synchronize_state(env);
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return 0;
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}
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static int cpu_post_load(void *opaque, int version_id)
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{
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CPUState *env = opaque;
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int i;
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/* XXX: restore FPU round state */
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env->fpstt = (env->fpus_vmstate >> 11) & 7;
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env->fpus = env->fpus_vmstate & ~0x3800;
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env->fptag_vmstate ^= 0xff;
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for(i = 0; i < 8; i++) {
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env->fptags[i] = (env->fptag_vmstate >> i) & 1;
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}
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cpu_breakpoint_remove_all(env, BP_CPU);
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cpu_watchpoint_remove_all(env, BP_CPU);
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for (i = 0; i < 4; i++)
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hw_breakpoint_insert(env, i);
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if (version_id >= 9) {
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memset(&env->interrupt_bitmap, 0, sizeof(env->interrupt_bitmap));
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if (env->pending_irq_vmstate >= 0) {
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env->interrupt_bitmap[env->pending_irq_vmstate / 64] |=
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(uint64_t)1 << (env->pending_irq_vmstate % 64);
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}
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}
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return cpu_post_load(env, version_id);
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}
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int cpu_load(QEMUFile *f, void *opaque, int version_id)
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{
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CPUState *env = opaque;
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int i, guess_mmx;
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cpu_pre_load(env);
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if (version_id < 3 || version_id > CPU_SAVE_VERSION)
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return -EINVAL;
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for(i = 0; i < CPU_NB_REGS; i++)
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qemu_get_betls(f, &env->regs[i]);
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qemu_get_betls(f, &env->eip);
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qemu_get_betls(f, &env->eflags);
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qemu_get_be32s(f, &env->hflags);
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qemu_get_be16s(f, &env->fpuc);
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qemu_get_be16s(f, &env->fpus_vmstate);
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qemu_get_be16s(f, &env->fptag_vmstate);
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qemu_get_be16s(f, &env->fpregs_format_vmstate);
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/* NOTE: we cannot always restore the FPU state if the image come
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from a host with a different 'USE_X86LDOUBLE' define. We guess
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if we are in an MMX state to restore correctly in that case. */
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guess_mmx = ((env->fptag_vmstate == 0xff) && (env->fpus_vmstate & 0x3800) == 0);
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for(i = 0; i < 8; i++) {
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uint64_t mant;
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uint16_t exp;
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switch(env->fpregs_format_vmstate) {
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case 0:
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mant = qemu_get_be64(f);
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exp = qemu_get_be16(f);
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#ifdef USE_X86LDOUBLE
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env->fpregs[i].d = cpu_set_fp80(mant, exp);
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#else
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/* difficult case */
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if (guess_mmx)
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env->fpregs[i].mmx.MMX_Q(0) = mant;
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else
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env->fpregs[i].d = cpu_set_fp80(mant, exp);
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#endif
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break;
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case 1:
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mant = qemu_get_be64(f);
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#ifdef USE_X86LDOUBLE
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{
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union x86_longdouble *p;
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/* difficult case */
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p = (void *)&env->fpregs[i];
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if (guess_mmx) {
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p->mant = mant;
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p->exp = 0xffff;
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} else {
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fp64_to_fp80(p, mant);
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}
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}
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#else
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env->fpregs[i].mmx.MMX_Q(0) = mant;
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#endif
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break;
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default:
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return -EINVAL;
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}
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}
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for(i = 0; i < 6; i++)
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cpu_get_seg(f, &env->segs[i]);
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cpu_get_seg(f, &env->ldt);
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cpu_get_seg(f, &env->tr);
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cpu_get_seg(f, &env->gdt);
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cpu_get_seg(f, &env->idt);
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qemu_get_be32s(f, &env->sysenter_cs);
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if (version_id >= 7) {
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qemu_get_betls(f, &env->sysenter_esp);
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qemu_get_betls(f, &env->sysenter_eip);
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} else {
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env->sysenter_esp = qemu_get_be32(f);
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env->sysenter_eip = qemu_get_be32(f);
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}
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qemu_get_betls(f, &env->cr[0]);
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qemu_get_betls(f, &env->cr[2]);
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qemu_get_betls(f, &env->cr[3]);
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qemu_get_betls(f, &env->cr[4]);
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for(i = 0; i < 8; i++)
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qemu_get_betls(f, &env->dr[i]);
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qemu_get_sbe32s(f, &env->a20_mask);
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qemu_get_be32s(f, &env->mxcsr);
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for(i = 0; i < CPU_NB_REGS; i++) {
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cpu_get_xmm_reg(f, &env->xmm_regs[i]);
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}
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#ifdef TARGET_X86_64
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qemu_get_be64s(f, &env->efer);
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qemu_get_be64s(f, &env->star);
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qemu_get_be64s(f, &env->lstar);
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qemu_get_be64s(f, &env->cstar);
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qemu_get_be64s(f, &env->fmask);
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qemu_get_be64s(f, &env->kernelgsbase);
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#endif
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if (version_id >= 4) {
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qemu_get_be32s(f, &env->smbase);
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}
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if (version_id >= 5) {
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qemu_get_be64s(f, &env->pat);
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qemu_get_be32s(f, &env->hflags2);
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if (version_id < 6)
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qemu_get_be32s(f, &env->halted);
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qemu_get_be64s(f, &env->vm_hsave);
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qemu_get_be64s(f, &env->vm_vmcb);
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qemu_get_be64s(f, &env->tsc_offset);
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qemu_get_be64s(f, &env->intercept);
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qemu_get_be16s(f, &env->intercept_cr_read);
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qemu_get_be16s(f, &env->intercept_cr_write);
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qemu_get_be16s(f, &env->intercept_dr_read);
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qemu_get_be16s(f, &env->intercept_dr_write);
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qemu_get_be32s(f, &env->intercept_exceptions);
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qemu_get_8s(f, &env->v_tpr);
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}
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if (version_id >= 8) {
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/* MTRRs */
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for(i = 0; i < 11; i++)
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qemu_get_be64s(f, &env->mtrr_fixed[i]);
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qemu_get_be64s(f, &env->mtrr_deftype);
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for(i = 0; i < 8; i++) {
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cpu_get_mtrr_var(f, &env->mtrr_var[i]);
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}
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}
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if (version_id >= 9) {
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qemu_get_sbe32s(f, &env->pending_irq_vmstate);
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qemu_get_be32s(f, &env->mp_state);
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qemu_get_be64s(f, &env->tsc);
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}
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if (version_id >= 10) {
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qemu_get_be64s(f, &env->mcg_cap);
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qemu_get_be64s(f, &env->mcg_status);
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qemu_get_be64s(f, &env->mcg_ctl);
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for (i = 0; i < MCE_BANKS_DEF * 4; i++) {
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qemu_get_be64s(f, &env->mce_banks[i]);
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}
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}
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if (version_id >= 11) {
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qemu_get_be64s(f, &env->tsc_aux);
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}
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tlb_flush(env, 1);
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return 0;
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}
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