qemu/target/ppc
Matheus Ferst 0ff16b6b78 target/ppc: fix vector registers access in gdbstub for little-endian
As vector registers are stored in host endianness, we shouldn't swap its
64-bit elements in user mode. Add a 16-byte case in
ppc_maybe_bswap_register to handle the reordering of elements in softmmu
and remove avr_need_swap which is now unused.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20210826145656.2507213-3-matheus.ferst@eldorado.org.br>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-08-27 12:43:13 +10:00
..
translate
arch_dump.c
compat.c
cpu_init.c
cpu-models.c
cpu-models.h
cpu-param.h
cpu-qom.h
cpu.c
cpu.h
dfp_helper.c
excp_helper.c
fpu_helper.c
gdbstub.c target/ppc: fix vector registers access in gdbstub for little-endian 2021-08-27 12:43:13 +10:00
helper_regs.c
helper_regs.h
helper.h
insn32.decode
insn64.decode
int_helper.c
internal.h
Kconfig
kvm_ppc.h
kvm-stub.c
kvm.c
machine.c
mem_helper.c
meson.build
mfrom_table_gen.c
mfrom_table.c.inc
misc_helper.c
mmu_common.c
mmu_helper.c
mmu-book3s-v3.c
mmu-book3s-v3.h
mmu-books.h
mmu-hash32.c
mmu-hash32.h
mmu-hash64.c
mmu-hash64.h
mmu-radix64.c
mmu-radix64.h
monitor.c
spr_tcg.h
tcg-stub.c
timebase_helper.c
trace-events
trace.h
translate.c
user_only_helper.c