qemu/target/microblaze
Joe Komlodi 2016a6a765 target/microblaze: Fix FPU2 instruction check
The check to see if we can use FPU2 instructions would return 0 if
cfg.use_fpu == 2, rather than returning the PVR2_USE_FPU2_MASK.

This would cause all FPU2 instructions (fsqrt, flt, fint) to not be used.

Signed-off-by: Joe Komlodi <komlodi@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-Id: <1589219346-106769-2-git-send-email-komlodi@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2020-05-14 13:44:36 +02:00
..
Makefile.objs
cpu-param.h tcg: Split out target/arch/cpu-param.h 2019-06-10 07:03:34 -07:00
cpu-qom.h cpu: Use DeviceClass reset instead of a special CPUClass reset 2020-03-17 19:48:10 -04:00
cpu.c target/microblaze: Add the pvr-user2 property 2020-04-30 12:11:03 +02:00
cpu.h target/microblaze: Add the pvr-user2 property 2020-04-30 12:11:03 +02:00
gdbstub.c gdbstub: extend GByteArray to read register helpers 2020-03-17 17:38:38 +00:00
helper.c tcg: Use CPUClass::tlb_fill in cputlb.c 2019-05-10 11:12:50 -07:00
helper.h target-microblaze: Add support for extended access to TLBLO 2018-05-29 09:35:14 +02:00
microblaze-decode.h Supply missing header guards 2019-06-12 13:20:21 +02:00
mmu.c target/microblaze: Use env_cpu, env_archcpu 2019-06-10 07:03:42 -07:00
mmu.h Supply missing header guards 2019-06-12 13:20:21 +02:00
op_helper.c target/microblaze: Add the div-zero-exception property 2020-04-30 12:11:03 +02:00
translate.c target/microblaze: Fix FPU2 instruction check 2020-05-14 13:44:36 +02:00