Tom Musta 1fa74845f2 target-ppc: Bug Fix: mullw
For 64-bit implementations, the mullw result is the 64 bit product
of the sign-extended least significant 32 bits of the source
registers.

Fix the code to properly sign extend the source operands and produce
a 64 bit product.

Example:
R3 00000000002F37A0
R4 41C33D242F816715
mullw 3,3,4
R3 expected : 0008C3146AE0F020
R3 actual   : 000000006AE0F020 (without this patch)

Signed-off-by: Tom Musta <tommusta@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2014-09-08 12:50:50 +02:00
2014-08-20 21:15:56 +02:00
2014-06-23 11:00:12 -04:00
2014-09-08 12:50:49 +02:00
2014-08-26 13:52:15 +01:00
2014-08-18 14:39:10 -04:00
2014-09-08 12:50:50 +02:00
2014-08-24 13:16:32 +04:00
2014-08-29 18:40:04 +01:00
2014-09-01 10:19:03 +02:00
2014-06-16 13:24:35 +02:00
2014-06-09 15:43:40 +02:00
2014-08-29 10:46:58 +01:00
2014-08-29 10:46:58 +01:00
2014-08-29 10:46:58 +01:00
2014-06-23 11:12:28 -04:00
2014-08-29 10:46:58 +01:00
2014-07-14 12:03:21 +02:00
2014-06-19 18:44:21 +03:00
2014-06-19 16:41:54 +03:00
2014-08-15 16:37:17 +01:00
2014-08-15 16:37:17 +01:00
2014-06-23 19:09:50 +02:00
2014-08-18 14:39:10 -04:00
2014-08-29 10:48:45 +01:00
2014-08-15 18:44:48 +01:00
2014-08-18 11:59:27 +01:00
2014-05-24 00:07:29 +04:00
2014-08-06 17:53:07 +02:00
2014-06-05 16:10:33 +02:00
2014-08-01 18:30:08 +01:00
2014-07-07 10:37:40 +00:00

Read the documentation in qemu-doc.html or on http://wiki.qemu-project.org

- QEMU team
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