Daniel Henrique Barboza 1f99146103 hw/riscv/boot.c: use MachineState in riscv_load_initrd() ... 'filename', 'mem_size' and 'fdt' from riscv_load_initrd() can all be retrieved by the MachineState object for all callers. Cc: Palmer Dabbelt <palmer@dabbelt.com> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20230102115241.25733-9-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>		2023-01-20 10:14:13 +10:00
..
boot.c	hw/riscv/boot.c: use MachineState in riscv_load_initrd()	2023-01-20 10:14:13 +10:00
Kconfig	hw/riscv: Sort machines Kconfig options in alphabetical order	2023-01-06 10:42:55 +10:00
meson.build	hw/riscv/Kconfig: Restrict NUMA to Virt & Spike machines	2021-07-20 15:32:49 +02:00
microchip_pfsoc.c	hw/riscv/boot.c: use MachineState in riscv_load_initrd()	2023-01-20 10:14:13 +10:00
numa.c
opentitan.c	hw/riscv: opentitan: Drop "hartid-base" and "priority-base" initialization	2023-01-06 10:42:55 +10:00
riscv_hart.c
shakti_c.c	hw/riscv: remove 'fdt' param from riscv_setup_rom_reset_vec()	2022-09-07 09:18:33 +02:00
sifive_e.c	hw/riscv: Make CPU config error handling generous (sifive_e/u/opentitan)	2022-05-24 10:38:50 +10:00
sifive_u.c	hw/riscv/boot.c: use MachineState in riscv_load_initrd()	2023-01-20 10:14:13 +10:00
spike.c	hw/riscv/boot.c: use MachineState in riscv_load_initrd()	2023-01-20 10:14:13 +10:00
virt.c	hw/riscv/boot.c: use MachineState in riscv_load_initrd()	2023-01-20 10:14:13 +10:00