Alistair Francis 3ef6434409 hw/riscv: OpenTitan: Connect the mtime and mtimecmp timer ...

Connect the Ibex timer to the OpenTitan machine. The timer can trigger
the RISC-V MIE interrupt as well as a custom device interrupt.

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Message-id: 5e7f4e9b4537f863bcb8db1264b840b56ef2a929.1624001156.git.alistair.francis@wdc.com

2021-06-24 05:00:13 -07:00

..

boot.c

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Kconfig

hw/riscv: Enable VIRTIO_VGA for RISC-V virt machine

2021-05-11 20:02:06 +10:00

meson.build

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microchip_pfsoc.c

hw/riscv: microchip_pfsoc: Support direct kernel boot

2021-06-08 09:59:42 +10:00

numa.c

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opentitan.c

hw/riscv: OpenTitan: Connect the mtime and mtimecmp timer

2021-06-24 05:00:13 -07:00

riscv_hart.c

…

shakti_c.c

hw/riscv: Connect Shakti UART to Shakti platform

2021-05-11 20:02:06 +10:00

sifive_e.c

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sifive_u.c

hw/riscv: Use macros for BIOS image names

2021-06-08 09:59:42 +10:00

spike.c

hw/riscv: Use macros for BIOS image names

2021-06-08 09:59:42 +10:00

virt.c

hw/riscv: Use macros for BIOS image names

2021-06-08 09:59:42 +10:00