aeb6326ec5
The port currently does not support "oversize" guests, which means riscv32 can only target 32-bit guests. We will soon be building TCG once for all guests. This implies that we can only support riscv64. Since all Linux distributions target riscv64 not riscv32, this is not much of a restriction and simplifies the code. The brcond2 and setcond2 opcodes are exclusive to 32-bit hosts, so we can and should remove the stubs. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
23 lines
534 B
C
23 lines
534 B
C
/* SPDX-License-Identifier: MIT */
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/*
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* Define RISC-V target-specific constraint sets.
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* Copyright (c) 2021 Linaro
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*/
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/*
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* C_On_Im(...) defines a constraint set with <n> outputs and <m> inputs.
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* Each operand should be a sequence of constraint letters as defined by
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* tcg-target-con-str.h; the constraint combination is inclusive or.
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*/
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C_O0_I1(r)
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C_O0_I2(LZ, L)
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C_O0_I2(rZ, r)
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C_O0_I2(rZ, rZ)
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C_O1_I1(r, L)
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C_O1_I1(r, r)
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C_O1_I2(r, r, ri)
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C_O1_I2(r, r, rI)
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C_O1_I2(r, rZ, rN)
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C_O1_I2(r, rZ, rZ)
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C_O2_I4(r, r, rZ, rZ, rM, rM)
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